reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/X86/X86ISelLowering.cpp
14172   assert(V1.getSimpleValueType() == MVT::v16i8 && "Bad operand type!");
14177   if (SDValue Shift = lowerShuffleAsShift(DL, MVT::v16i8, V1, V2, Mask,
14182   if (SDValue Rotate = lowerShuffleAsByteRotate(DL, MVT::v16i8, V1, V2, Mask,
14187   if (SDValue V = lowerShuffleWithPACK(DL, MVT::v16i8, Mask, V1, V2, DAG,
14192   if (SDValue ZExt = lowerShuffleAsZeroOrAnyExtend(DL, MVT::v16i8, V1, V2, Mask,
14198     if (SDValue V = lowerShuffleWithSSE4A(DL, MVT::v16i8, V1, V2, Mask,
14207     if (SDValue Broadcast = lowerShuffleAsBroadcast(DL, MVT::v16i8, V1, V2,
14211     if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v16i8, Mask, V1, V2, DAG))
14275       V1 = DAG.getBitcast(
14277           DAG.getVectorShuffle(MVT::v8i16, DL, DAG.getBitcast(MVT::v8i16, V1),
14288       V1 = DAG.getNode(TargetLo ? X86ISD::UNPCKL : X86ISD::UNPCKH, DL,
14289                        MVT::v16i8, EvenInUse ? V1 : DAG.getUNDEF(MVT::v16i8),
14290                        OddInUse ? V1 : DAG.getUNDEF(MVT::v16i8));
14305           DAG.getVectorShuffle(MVT::v8i16, DL, DAG.getBitcast(MVT::v8i16, V1),
14312   if (SDValue Masked = lowerShuffleAsBitMask(DL, MVT::v16i8, V1, V2, Mask,
14317   if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v16i8, Mask, V1, V2, DAG))
14322           DL, MVT::v16i8, V1, V2, Mask, Zeroable, Subtarget, DAG))
14343         DL, MVT::v16i8, V1, V2, Mask, Zeroable, DAG, V1InUse, V2InUse);
14350         if (SDValue Blend = lowerShuffleAsBlend(DL, MVT::v16i8, V1, V2, Mask,
14363               DL, MVT::v16i8, V1, V2, Mask, Subtarget, DAG))
14368         return lowerShuffleWithPERMV(DL, MVT::v16i8, Mask, V1, V2, DAG);
14373               DL, MVT::v16i8, V1, V2, Mask, Subtarget, DAG))
14383             DL, MVT::v16i8, V1, V2, Mask, Zeroable, Subtarget, DAG))
14386   if (SDValue Blend = lowerShuffleAsBitBlend(DL, MVT::v16i8, V1, V2, Mask, DAG))
14409     V1 = DAG.getNode(ISD::AND, DL, MVT::v16i8, V1, ByteClearMask);
14409     V1 = DAG.getNode(ISD::AND, DL, MVT::v16i8, V1, ByteClearMask);
14414     V1 = DAG.getBitcast(MVT::v8i16, V1);
14414     V1 = DAG.getBitcast(MVT::v8i16, V1);
14415     V2 = IsSingleInput ? V1 : DAG.getBitcast(MVT::v8i16, V2);
14416     SDValue Result = DAG.getNode(X86ISD::PACKUS, DL, MVT::v16i8, V1, V2);
14427     return lowerShuffleAsDecomposedShuffleBlend(DL, MVT::v16i8, V1, V2, Mask,
14433   SDValue V = V1;