reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/X86/X86ISelLowering.cpp
25795       return DAG.getNode(X86ISD::VPSHL, dl, VT, R, Amt);
25797       return DAG.getNode(X86ISD::VPSHA, dl, VT, R, Amt);
25806     SDValue R0 = DAG.getNode(Opc, dl, VT, R, Amt0);
25807     SDValue R1 = DAG.getNode(Opc, dl, VT, R, Amt1);
25818     R = DAG.getNode(ISD::SRL, dl, VT, R, Amt);
25818     R = DAG.getNode(ISD::SRL, dl, VT, R, Amt);
25819     R = DAG.getNode(ISD::XOR, dl, VT, R, M);
25819     R = DAG.getNode(ISD::XOR, dl, VT, R, M);
25820     R = DAG.getNode(ISD::SUB, dl, VT, R, M);
25820     R = DAG.getNode(ISD::SUB, dl, VT, R, M);
25821     return R;
25868         SDValue Shift1 = getTargetVShiftByConstNode(X86OpcI, dl, VT, R,
25870         SDValue Shift2 = getTargetVShiftByConstNode(X86OpcI, dl, VT, R,
25881       return DAG.getNode(ISD::MUL, dl, VT, R, Scale);
25892       SDValue Res = DAG.getNode(ISD::MULHU, dl, VT, R, Scale);
25893       return DAG.getSelect(dl, VT, ZAmt, R, Res);
25914           getTargetVShiftByConstNode(X86ISD::VSRAI, dl, VT, R, 1, DAG);
25915       SDValue Res = DAG.getNode(ISD::MULHS, dl, VT, R, Scale);
25916       Res = DAG.getSelect(dl, VT, Amt0, R, Res);
25960     SDValue R0 = DAG.getNode(ShOpc, dl, VT, R, DAG.getBitcast(VT, Amt0));
25961     SDValue R1 = DAG.getNode(ShOpc, dl, VT, R, DAG.getBitcast(VT, Amt1));
25962     SDValue R2 = DAG.getNode(ShOpc, dl, VT, R, DAG.getBitcast(VT, Amt2));
25963     SDValue R3 = DAG.getNode(ShOpc, dl, VT, R, DAG.getBitcast(VT, Amt3));
25991     R = DAG.getNode(ExtOpc, dl, ExtVT, R);
25991     R = DAG.getNode(ExtOpc, dl, ExtVT, R);
25994                        DAG.getNode(Opc, dl, ExtVT, R, Amt));
26016       R = Opc == ISD::SRA ? DAG.getSExtOrTrunc(R, dl, ExVT)
26016       R = Opc == ISD::SRA ? DAG.getSExtOrTrunc(R, dl, ExVT)
26017                           : DAG.getZExtOrTrunc(R, dl, ExVT);
26018       R = DAG.getNode(ISD::MUL, dl, ExVT, R, Amt);
26018       R = DAG.getNode(ISD::MUL, dl, ExVT, R, Amt);
26019       R = DAG.getNode(X86ISD::VSRLI, dl, ExVT, R, Cst8);
26019       R = DAG.getNode(X86ISD::VSRLI, dl, ExVT, R, Cst8);
26020       return DAG.getZExtOrTrunc(R, dl, VT);
26035     SDValue LoR = DAG.getBitcast(VT16, getUnpackl(DAG, dl, VT, R, R));
26035     SDValue LoR = DAG.getBitcast(VT16, getUnpackl(DAG, dl, VT, R, R));
26036     SDValue HiR = DAG.getBitcast(VT16, getUnpackh(DAG, dl, VT, R, R));
26036     SDValue HiR = DAG.getBitcast(VT16, getUnpackh(DAG, dl, VT, R, R));
26088       SDValue M = DAG.getNode(Opc, dl, VT, R, DAG.getConstant(4, dl, VT));
26089       R = SignBitSelect(VT, Amt, M, R);
26089       R = SignBitSelect(VT, Amt, M, R);
26095       M = DAG.getNode(Opc, dl, VT, R, DAG.getConstant(2, dl, VT));
26096       R = SignBitSelect(VT, Amt, M, R);
26096       R = SignBitSelect(VT, Amt, M, R);
26102       M = DAG.getNode(Opc, dl, VT, R, DAG.getConstant(1, dl, VT));
26103       R = SignBitSelect(VT, Amt, M, R);
26103       R = SignBitSelect(VT, Amt, M, R);
26104       return R;
26113       SDValue RLo = getUnpackl(DAG, dl, VT, DAG.getUNDEF(VT), R);
26114       SDValue RHi = getUnpackh(DAG, dl, VT, DAG.getUNDEF(VT), R);
26159     SDValue RLo = getUnpackl(DAG, dl, VT, Z, R);
26160     SDValue RHi = getUnpackh(DAG, dl, VT, Z, R);
26209     SDValue M = getTargetVShiftByConstNode(X86OpcI, dl, VT, R, 8, DAG);
26210     R = SignBitSelect(Amt, M, R);
26210     R = SignBitSelect(Amt, M, R);
26216     M = getTargetVShiftByConstNode(X86OpcI, dl, VT, R, 4, DAG);
26217     R = SignBitSelect(Amt, M, R);
26217     R = SignBitSelect(Amt, M, R);
26223     M = getTargetVShiftByConstNode(X86OpcI, dl, VT, R, 2, DAG);
26224     R = SignBitSelect(Amt, M, R);
26224     R = SignBitSelect(Amt, M, R);
26230     M = getTargetVShiftByConstNode(X86OpcI, dl, VT, R, 1, DAG);
26231     R = SignBitSelect(Amt, M, R);
26231     R = SignBitSelect(Amt, M, R);
26232     return R;