reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/X86/X86ISelLowering.cpp
20638     MVT EltVT = Op0.getSimpleValueType().getVectorElementType();
20651       VT = Op0.getSimpleValueType();
20657     unsigned SSECC = translateX86FSETCC(Cond, Op0, Op1);
20673       SDValue Cmp0 = DAG.getNode(Opc, dl, VT, Op0, Op1,
20675       SDValue Cmp1 = DAG.getNode(Opc, dl, VT, Op0, Op1,
20680       Cmp = DAG.getNode(Opc, dl, VT, Op0, Op1,
20693   MVT VTOp0 = Op0.getSimpleValueType();
20736     return DAG.getNode(Opc, dl, VT, Op0, Op1,
20743     SDValue BC0 = peekThroughBitcasts(Op0);
20759   if (Cond == ISD::SETEQ && Op0.getOpcode() == ISD::AND &&
20760       Op0.getOperand(1) == Op1 && Op0.hasOneUse()) {
20760       Op0.getOperand(1) == Op1 && Op0.hasOneUse()) {
20766       SDValue Result = Op0.getOperand(0);
20797                    !(DAG.SignBitIsZero(Op0) && DAG.SignBitIsZero(Op1));
20830     SDValue Result = DAG.getNode(Opc, dl, VT, Op0, Op1);
20831     Result = DAG.getNode(X86ISD::PCMPEQ, dl, VT, Op0, Result);
20841   if (SDValue V = LowerVSETCCWithSUBUS(Op0, Op1, VT, Cond, dl, Subtarget, DAG))
20855     std::swap(Op0, Op1);
20872       Op0 = DAG.getNode(ISD::XOR, dl, MVT::v2i64, Op0, SB);
20872       Op0 = DAG.getNode(ISD::XOR, dl, MVT::v2i64, Op0, SB);
20876       Op0 = DAG.getBitcast(MVT::v4i32, Op0);
20876       Op0 = DAG.getBitcast(MVT::v4i32, Op0);
20880       SDValue GT = DAG.getNode(X86ISD::PCMPGT, dl, MVT::v4i32, Op0, Op1);
20881       SDValue EQ = DAG.getNode(X86ISD::PCMPEQ, dl, MVT::v4i32, Op0, Op1);
20905       Op0 = DAG.getBitcast(MVT::v4i32, Op0);
20905       Op0 = DAG.getBitcast(MVT::v4i32, Op0);
20909       SDValue Result = DAG.getNode(Opc, dl, MVT::v4i32, Op0, Op1);
20929     Op0 = DAG.getNode(ISD::XOR, dl, VT, Op0, SM);
20929     Op0 = DAG.getNode(ISD::XOR, dl, VT, Op0, SM);
20933   SDValue Result = DAG.getNode(Opc, dl, VT, Op0, Op1);