reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
27820 SDLoc dl(N); 27821 switch (N->getOpcode()) { 27825 N->dump(&DAG); 27829 assert(N->getValueType(0) == MVT::i64 && "Unexpected VT!"); 27836 DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64, N->getOperand(0)); 27849 EVT VT = N->getValueType(0); 27855 SDValue Op0 = DAG.getNode(ISD::ANY_EXTEND, dl, MulVT, N->getOperand(0)); 27856 SDValue Op1 = DAG.getNode(ISD::ANY_EXTEND, dl, MulVT, N->getOperand(1)); 27872 EVT VT = N->getValueType(0); 27873 EVT InVT = N->getOperand(0).getValueType(); 27888 Ops[0] = N->getOperand(0); 27890 Ops[0] = N->getOperand(1); 27893 SDValue Res = DAG.getNode(N->getOpcode(), dl, WideVT, InVec0, InVec1); 27899 assert(N->getValueType(0) == MVT::i64 && 27905 Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(0), 27907 Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(0), 27927 EVT VT = N->getValueType(0); 27931 N->getOperand(0), UNDEF); 27933 N->getOperand(1), UNDEF); 27934 Results.push_back(DAG.getNode(N->getOpcode(), dl, MVT::v4f32, LHS, RHS)); 27941 EVT VT = N->getValueType(0); 27949 if (ISD::isConstantSplatVector(N->getOperand(1).getNode(), SplatVal)) { 27952 Ops0[0] = N->getOperand(0); 27956 SDValue Res = DAG.getNode(N->getOpcode(), dl, ResVT, N0, N1); 27966 SDValue V = LowerWin64_i128OP(SDValue(N,0), DAG); 27971 MVT VT = N->getSimpleValueType(0); 27979 SDValue In = N->getOperand(0); 28041 assert(N->getValueType(0) == MVT::v8i8 && 28046 EVT VT = N->getValueType(0); 28047 SDValue In = N->getOperand(0); 28053 assert(N->getOpcode() == ISD::SIGN_EXTEND && "Unexpected opcode"); 28090 In = DAG.getNode(N->getOpcode(), dl, InVT, In); 28096 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0)); 28099 SDValue Lo = getExtendInVec(N->getOpcode(), dl, LoVT, In, DAG); 28109 Hi = getExtendInVec(N->getOpcode(), dl, HiVT, Hi, DAG); 28118 bool IsSigned = N->getOpcode() == ISD::FP_TO_SINT; 28119 EVT VT = N->getValueType(0); 28120 SDValue Src = N->getOperand(0); 28136 Res = DAG.getNode(N->getOpcode() == ISD::FP_TO_UINT ? ISD::AssertZext 28197 Res = DAG.getNode(N->getOpcode(), SDLoc(N), VecVT, Res); 28197 Res = DAG.getNode(N->getOpcode(), SDLoc(N), VecVT, Res); 28203 if (SDValue V = FP_TO_INTHelper(SDValue(N, 0), DAG, IsSigned)) 28209 SDValue Src = N->getOperand(0); 28210 if (N->getValueType(0) != MVT::v2f32 || Src.getValueType() != MVT::v2i64) 28217 EVT VT = N->getValueType(0); 28220 SDValue Src = N->getOperand(0); 28240 if (!isTypeLegal(N->getOperand(0).getValueType())) 28242 SDValue V = DAG.getNode(X86ISD::VFPROUND, dl, MVT::v4f32, N->getOperand(0)); 28249 assert(N->getValueType(0) == MVT::v2f32 && 28254 unsigned IntNo = N->getConstantOperandVal(1); 28259 return getReadTimeStampCounter(N, dl, X86::RDTSC, DAG, Subtarget, 28262 return getReadTimeStampCounter(N, dl, X86::RDTSCP, DAG, Subtarget, 28265 expandIntrinsicWChainHelper(N, dl, DAG, X86::RDPMC, X86::ECX, Subtarget, 28269 expandIntrinsicWChainHelper(N, dl, DAG, X86::XGETBV, X86::ECX, Subtarget, 28275 return getReadTimeStampCounter(N, dl, X86::RDTSC, DAG, Subtarget, Results); 28278 EVT T = N->getValueType(0); 28285 cpInL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(2), 28287 cpInH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(2), 28289 cpInL = DAG.getCopyToReg(N->getOperand(0), dl, 28296 swapInL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(3), 28298 swapInH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(3), 28313 MachineMemOperand *MMO = cast<AtomicSDNode>(N)->getMemOperand(); 28329 SDValue Ops[] = {/*Chain*/ RBXSave.getValue(1), N->getOperand(1), swapInL, 28339 SDValue Ops[] = {swapInL.getValue(0), N->getOperand(1), 28354 Success = DAG.getZExtOrTrunc(Success, dl, N->getValueType(1)); 28362 assert(N->getValueType(0) == MVT::i64 && "Unexpected VT!"); 28367 auto *Node = cast<AtomicSDNode>(N); 28438 EVT DstVT = N->getValueType(0); 28439 EVT SrcVT = N->getOperand(0).getValueType(); 28446 std::tie(Lo, Hi) = DAG.SplitVectorOperand(N, 0); 28458 std::tie(Lo, Hi) = DAG.SplitVectorOperand(N, 0); 28471 SDValue Res = DAG.getNode(X86ISD::MOVQ2DQ, dl, WideVT, N->getOperand(0)); 28479 EVT VT = N->getValueType(0); 28482 auto *Gather = cast<MaskedGatherSDNode>(N); 28516 MVT VT = N->getSimpleValueType(0); 28520 if (!ISD::isNON_EXTLoad(N)) 28522 auto *Ld = cast<LoadSDNode>(N);