reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/X86/X86ISelLowering.cpp

16881     SDValue Extract = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ExtractVT,
16883                                   DAG.getIntPtrConstant(0, DL));
16884     return DAG.getNode(ISD::INSERT_SUBVECTOR, DL, VT,
16885                        DAG.getConstant(0, DL, VT),
16886                        Extract, DAG.getIntPtrConstant(0, DL));
16890   if (SDValue Shift = lower1BitShuffleAsKSHIFTR(DL, Mask, VT, V1, V2, Subtarget,
16903       SDValue Res = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, WideVT,
16905                                 DAG.getIntPtrConstant(0, DL));
16910         Res = DAG.getNode(X86ISD::KSHIFTL, DL, WideVT, Res,
16911                           DAG.getTargetConstant(WideElts - NumElts, DL, MVT::i8));
16916       Res = DAG.getNode(Opcode, DL, WideVT, Res,
16917                         DAG.getTargetConstant(ShiftAmt, DL, MVT::i8));
16918       return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, Res,
16919                          DAG.getIntPtrConstant(0, DL));
16957   V1 = DAG.getNode(ISD::SIGN_EXTEND, DL, ExtVT, V1);
16958   V2 = DAG.getNode(ISD::SIGN_EXTEND, DL, ExtVT, V2);
16960   SDValue Shuffle = DAG.getVectorShuffle(ExtVT, DL, V1, V2, Mask);
16965     return DAG.getSetCC(DL, VT, DAG.getConstant(0, DL, ExtVT),
16965     return DAG.getSetCC(DL, VT, DAG.getConstant(0, DL, ExtVT),
16968   return DAG.getNode(ISD::TRUNCATE, DL, VT, Shuffle);