|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
lib/Target/X86/X86ISelLowering.cpp21223 DAG.getNode(X86ISD::FSETCCM, DL, MVT::v1i1, CondOp0, CondOp1,
21224 DAG.getTargetConstant(SSECC, DL, MVT::i8));
21226 return DAG.getNode(X86ISD::SELECTS, DL, VT, Cmp, Op1, Op2);
21230 SDValue Cmp = DAG.getNode(X86ISD::FSETCC, DL, VT, CondOp0, CondOp1,
21231 DAG.getTargetConstant(SSECC, DL, MVT::i8));
21250 SDValue VOp1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecVT, Op1);
21251 SDValue VOp2 = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecVT, Op2);
21252 SDValue VCmp = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecVT, Cmp);
21257 SDValue VSel = DAG.getSelect(DL, VecVT, VCmp, VOp1, VOp2);
21259 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
21260 VSel, DAG.getIntPtrConstant(0, DL));
21262 SDValue AndN = DAG.getNode(X86ISD::FANDN, DL, VT, Cmp, Op2);
21263 SDValue And = DAG.getNode(X86ISD::FAND, DL, VT, Cmp, Op1);
21264 return DAG.getNode(X86ISD::FOR, DL, VT, AndN, And);
21270 SDValue Cmp = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, MVT::v1i1, Cond);
21271 return DAG.getNode(X86ISD::SELECTS, DL, VT, Cmp, Op1, Op2);
21277 SDValue Op1Lo = extractSubVector(Op1, 0, DAG, DL, 32);
21278 SDValue Op2Lo = extractSubVector(Op2, 0, DAG, DL, 32);
21279 SDValue Op1Hi = extractSubVector(Op1, 32, DAG, DL, 32);
21280 SDValue Op2Hi = extractSubVector(Op2, 32, DAG, DL, 32);
21281 SDValue Lo = DAG.getSelect(DL, MVT::v32i1, Cond, Op1Lo, Op2Lo);
21282 SDValue Hi = DAG.getSelect(DL, MVT::v32i1, Cond, Op1Hi, Op2Hi);
21283 return DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, Lo, Hi);
21298 SDValue newSelect = DAG.getSelect(DL, Op1Scalar.getValueType(), Cond,
21303 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, ExtVec,
21304 DAG.getIntPtrConstant(0, DL));
21341 SDValue Zero = DAG.getConstant(0, DL, CmpOp0.getValueType());
21342 SDValue CmpZero = DAG.getNode(X86ISD::CMP, DL, MVT::i32, Zero, CmpOp0);
21344 Zero = DAG.getConstant(0, DL, Op.getValueType());
21345 return DAG.getNode(X86ISD::SBB, DL, VTs, Zero, Zero, CmpZero);
21348 Cmp = DAG.getNode(X86ISD::CMP, DL, MVT::i32,
21349 CmpOp0, DAG.getConstant(1, DL, CmpOp0.getValueType()));
21353 SDValue Zero = DAG.getConstant(0, DL, Op.getValueType());
21355 DAG.getNode(X86ISD::SBB, DL, VTs, Zero, Zero, Cmp);
21358 Res = DAG.getNOT(DL, Res, Res.getValueType());
21361 Res = DAG.getNode(ISD::OR, DL, Res.getValueType(), Res, Y);
21388 Neg = DAG.getNode(ISD::TRUNCATE, DL, VT, CmpOp0);
21390 Neg = DAG.getNode(ISD::AND, DL, VT,
21391 DAG.getNode(ISD::ANY_EXTEND, DL, VT, CmpOp0.getOperand(0)),
21392 DAG.getConstant(1, DL, VT));
21395 SDValue Mask = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT),
21395 SDValue Mask = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT),
21397 SDValue And = DAG.getNode(ISD::AND, DL, VT, Mask, Src1); // Mask & z
21398 return DAG.getNode(Op2.getOpcode(), DL, VT, And, Src2); // And Op y
21434 CC = DAG.getTargetConstant(X86Cond, DL, MVT::i8);
21447 if (SDValue BT = LowerAndToBT(Cond, ISD::SETNE, DL, DAG, BTCC)) {
21456 CC = DAG.getTargetConstant(X86::COND_NE, DL, MVT::i8);
21457 Cond = EmitCmp(Cond, DAG.getConstant(0, DL, Cond.getValueType()),
21458 X86::COND_NE, DL, DAG);
21473 DAG.getNode(X86ISD::SETCC_CARRY, DL, Op.getValueType(),
21474 DAG.getTargetConstant(X86::COND_B, DL, MVT::i8), Cond);
21476 return DAG.getNOT(DL, Res, Res.getValueType());
21490 SDValue Cmov = DAG.getNode(X86ISD::CMOV, DL, T1.getValueType(), T2, T1,
21492 return DAG.getNode(ISD::TRUNCATE, DL, Op.getValueType(), Cmov);
21505 Op1 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, Op1);
21506 Op2 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, Op2);
21508 SDValue Cmov = DAG.getNode(X86ISD::CMOV, DL, MVT::i32, Ops);
21509 return DAG.getNode(ISD::TRUNCATE, DL, Op.getValueType(), Cmov);
21515 return DAG.getNode(X86ISD::CMOV, DL, Op.getValueType(), Ops);