reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
9592 return LowerBUILD_VECTORvXi1(Op, DAG, Subtarget); 9594 if (SDValue VectorConstant = materializeVectorConstant(Op, DAG, Subtarget)) 9598 if (SDValue AddSub = lowerToAddSubOrFMAddSub(BV, Subtarget, DAG)) 9600 if (SDValue HorizontalOp = LowerToHorizontalOp(BV, Subtarget, DAG)) 9602 if (SDValue Broadcast = lowerBuildVectorAsBroadcast(BV, Subtarget, DAG)) 9604 if (SDValue BitOp = lowerBuildVectorToBitOp(BV, DAG)) 9635 return DAG.getUNDEF(VT); 9649 LLVMContext &Context = *DAG.getContext(); 9664 InsIndex = DAG.getConstant(i, dl, getVectorIdxTy(DAG.getDataLayout())); 9664 InsIndex = DAG.getConstant(i, dl, getVectorIdxTy(DAG.getDataLayout())); 9668 SDValue DAGConstVec = DAG.getConstantPool(CV, VT); 9676 SDValue LegalDAGConstVec = LowerConstantPool(DAGConstVec, DAG); 9677 MachineFunction &MF = DAG.getMachineFunction(); 9679 SDValue Ld = DAG.getLoad(VT, dl, DAG.getEntryNode(), LegalDAGConstVec, MPI); 9679 SDValue Ld = DAG.getLoad(VT, dl, DAG.getEntryNode(), LegalDAGConstVec, MPI); 9683 return DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Ld, VarElt, InsIndex); 9693 SDValue S2V = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, VarElt); 9694 return DAG.getVectorShuffle(VT, dl, Ld, S2V, ShuffleMask); 9708 return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Item); 9715 Item = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Item); 9717 return getShuffleVectorZeroOrUndef(Item, 0, true, Subtarget, DAG); 9723 Item = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Item); 9725 Item = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, ShufVT, Item); 9726 Item = getShuffleVectorZeroOrUndef(Item, 0, true, Subtarget, DAG); 9727 return DAG.getBitcast(VT, Item); 9737 DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, 9739 NumBits/2, DAG, *this, dl); 9751 Item = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Item); 9752 return getShuffleVectorZeroOrUndef(Item, Idx, NumZero > 0, Subtarget, DAG); 9766 return LowerAsSplatVectorLoad(Item, VT, dl, DAG); 9776 if (SDValue V = LowerBUILD_VECTORAsVariablePermute(Op, DAG, Subtarget)) 9783 EltsFromConsecutiveLoads(VT, Ops, dl, DAG, Subtarget, false)) 9792 DAG.getUNDEF(EltVT), DAG.getUNDEF(EltVT) }; 9792 DAG.getUNDEF(EltVT), DAG.getUNDEF(EltVT) }; 9804 SDValue NewBV = DAG.getBitcast(MVT::getVectorVT(WideEltVT, 2), 9805 DAG.getBuildVector(NarrowVT, dl, Ops)); 9808 return DAG.getBitcast(VT, DAG.getNode(X86ISD::VBROADCAST, dl, BcastVT, 9808 return DAG.getBitcast(VT, DAG.getNode(X86ISD::VBROADCAST, dl, BcastVT, 9820 DAG.getBuildVector(HVT, dl, Op->ops().slice(0, NumElems / 2)); 9821 SDValue Upper = DAG.getBuildVector( 9825 return concatSubVectors(Lower, Upper, DAG, dl); 9833 SDValue V2 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, 9835 return getShuffleVectorZeroOrUndef(V2, Idx, true, Subtarget, DAG); 9843 DAG, Subtarget)) 9848 DAG, Subtarget)) 9853 if (SDValue V = LowerBuildVectorv4x32(Op, DAG, Subtarget)) 9862 Ops[i] = getZeroVector(VT, Subtarget, DAG, dl); 9864 Ops[i] = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Op.getOperand(i)); 9874 Ops[i] = getMOVL(DAG, dl, VT, Ops[i*2+1], Ops[i*2]); 9877 Ops[i] = getMOVL(DAG, dl, VT, Ops[i*2], Ops[i*2+1]); 9880 Ops[i] = getUnpackl(DAG, dl, VT, Ops[i*2], Ops[i*2+1]); 9893 return DAG.getVectorShuffle(VT, dl, Ops[0], Ops[1], MaskVec); 9899 if (SDValue Sh = buildFromShuffleMostly(Op, DAG)) 9906 Result = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Op.getOperand(0)); 9908 Result = DAG.getUNDEF(VT); 9912 Result = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Result, 9913 Op.getOperand(i), DAG.getIntPtrConstant(i, dl)); 9924 Ops[i] = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Op.getOperand(i)); 9926 Ops[i] = DAG.getUNDEF(VT); 9943 Ops[i] = DAG.getVectorShuffle(VT, dl, Ops[2*i], Ops[(2*i)+1], Mask);