reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/X86/X86ISelLowering.cpp
35473     if (SDValue V = combineBitcastvxi1(DAG, VT, N0, dl, Subtarget))
35488         SDValue V = DAG.getNode(X86ISD::MOVMSK, dl, MVT::i32,
35489                                 DAG.getBitcast(MVT::v4f32, N00));
35490         return DAG.getZExtOrTrunc(V, dl, VT);
35498       N0 = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i8, N0);
35499       N0 = DAG.getBitcast(MVT::v8i1, N0);
35500       return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, N0,
35501                          DAG.getIntPtrConstant(0, dl));
35521           Ops.resize(NumConcats, DAG.getConstant(0, dl, SrcVT));
35522           N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v8i1, Ops);
35523           N0 = DAG.getBitcast(MVT::i8, N0);
35524           return DAG.getNode(ISD::TRUNCATE, dl, VT, N0);
35529       SmallVector<SDValue, 4> Ops(NumConcats, DAG.getUNDEF(SrcVT));
35531       N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v8i1, Ops);
35532       N0 = DAG.getBitcast(MVT::i8, N0);
35533       return DAG.getNode(ISD::TRUNCATE, dl, VT, N0);
35546     return DAG.getNode(ISD::TRUNCATE, SDLoc(N), VT,
35547                        DAG.getBitcast(MVT::i16, N0.getOperand(0)));
35554     SDVTList Tys = DAG.getVTList(VT, MVT::Other);
35557         DAG.getMemIntrinsicNode(X86ISD::VBROADCAST_LOAD, SDLoc(N), Tys, Ops,
35560     DAG.ReplaceAllUsesOfValueWith(SDValue(BCast, 1), ResNode.getValue(1));
35575         return DAG.getNode(X86ISD::MMX_MOVW2D, DL, VT,
35576                            DAG.getConstant(EltBits[0].trunc(32), DL, MVT::i32));
35580       return DAG.getBitcast(VT, DAG.getConstantFP(F64, DL, MVT::f64));
35580       return DAG.getBitcast(VT, DAG.getConstantFP(F64, DL, MVT::f64));
35596         N00 = LowUndef ? DAG.getAnyExtOrTrunc(N00, dl, MVT::i32)
35597                        : DAG.getZExtOrTrunc(N00, dl, MVT::i32);
35598         return DAG.getNode(X86ISD::MMX_MOVW2D, dl, VT, N00);
35608       return createMMXBuildVector(cast<BuildVectorSDNode>(N0), DAG, Subtarget);
35616         return DAG.getNode(X86ISD::MOVDQ2Q, SDLoc(N00), VT,
35617                            DAG.getBitcast(MVT::v2i64, N00));
35623       SDValue Res = DAG.getNode(ISD::CONCAT_VECTORS, DL, MVT::v4i32, N0,
35624                                 DAG.getUNDEF(MVT::v2i32));
35625       return DAG.getNode(X86ISD::MOVDQ2Q, DL, VT,
35626                          DAG.getBitcast(MVT::v2i64, Res));
35635     return combinevXi1ConstantToInteger(N0, DAG);
35643       return DAG.getConstant(1, SDLoc(N0), VT);
35645       return DAG.getConstant(0, SDLoc(N0), VT);
35650   if (SDValue V = combineCastedMaskArithmetic(N, DAG, DCI, Subtarget))
35678     SDValue CastedOp1 = DAG.getBitcast(VT, LogicOp1);
35679     return DAG.getNode(FPOpcode, DL0, VT, LogicOp0.getOperand(0), CastedOp1);
35685     SDValue CastedOp0 = DAG.getBitcast(VT, LogicOp0);
35686     return DAG.getNode(FPOpcode, DL0, VT, LogicOp1.getOperand(0), CastedOp0);