reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/X86/X86ISelLowering.cpp
33458       SDValue Horiz = DAG.getNode(Opcode0, DL, VT0, Lo, Hi);
33459       return DAG.getBitcast(VT, Horiz);
33481               /*HasVarMask*/ false, /*AllowVarMask*/ true, DAG, Subtarget))
33482         return DAG.getNode(X86ISD::VBROADCAST, DL, VT,
33483                            DAG.getBitcast(SrcVT, Res));
33490       EVT NewVT = EVT::getVectorVT(*DAG.getContext(), BCVT.getScalarType(),
33492       return DAG.getBitcast(VT, DAG.getNode(X86ISD::VBROADCAST, DL, NewVT, BC));
33492       return DAG.getBitcast(VT, DAG.getNode(X86ISD::VBROADCAST, DL, NewVT, BC));
33497       return DAG.getNode(X86ISD::VBROADCAST, DL, VT,
33498                          extract128BitVector(Src, 0, DAG, DL));
33502       return DAG.getNode(X86ISD::VBROADCAST, DL, VT, Src.getOperand(0));
33508         return extractSubVector(SDValue(User, 0), 0, DAG, DL,
33517       SDVTList Tys = DAG.getVTList(VT, MVT::Other);
33520           DAG.getMemIntrinsicNode(X86ISD::VBROADCAST_LOAD, DL, Tys, Ops,
33526         DAG.ReplaceAllUsesOfValueWith(SDValue(LN, 1), BcastLd.getValue(1));
33529         SDValue Scl = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, SrcVT, BcastLd,
33530                                   DAG.getIntPtrConstant(0, DL));
33553         return DAG.getBitcast(
33554             VT, DAG.getNode(X86ISD::BLENDI, DL, SrcVT, N0.getOperand(0),
33556                             DAG.getTargetConstant(BlendMask, DL, MVT::i8)));
33571       SDValue Res = DAG.getNode(X86ISD::VPERMI, DL, SrcVT, Src, N1);
33572       return DAG.getBitcast(VT, Res);
33600         SDValue ZeroIdx = DAG.getIntPtrConstant(0, DL);
33601         N10 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, SVT, N10, ZeroIdx);
33602         N11 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, SVT, N11, ZeroIdx);
33603         SDValue Scl = DAG.getNode(Opcode1, DL, SVT, N10, N11);
33604         SDValue SclVec = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VT, Scl);
33605         return DAG.getNode(Opcode, DL, VT, N0, SclVec);
33623       return DAG.getNode(X86ISD::INSERTPS, DL, VT, DAG.getUNDEF(VT), Op1,
33623       return DAG.getNode(X86ISD::INSERTPS, DL, VT, DAG.getUNDEF(VT), Op1,
33624                          DAG.getTargetConstant(InsertPSMask, DL, MVT::i8));
33628       return DAG.getNode(X86ISD::INSERTPS, DL, VT, Op0, DAG.getUNDEF(VT),
33628       return DAG.getNode(X86ISD::INSERTPS, DL, VT, Op0, DAG.getUNDEF(VT),
33629                          DAG.getTargetConstant(InsertPSMask, DL, MVT::i8));
33640         return DAG.getNode(X86ISD::INSERTPS, DL, VT, Op0, DAG.getUNDEF(VT),
33640         return DAG.getNode(X86ISD::INSERTPS, DL, VT, Op0, DAG.getUNDEF(VT),
33641                            DAG.getTargetConstant(InsertPSMask, DL, MVT::i8));
33648       return DAG.getNode(X86ISD::INSERTPS, DL, VT, Op0, Op1,
33649                          DAG.getTargetConstant(InsertPSMask, DL, MVT::i8));
33693         return DAG.getNode(X86ISD::INSERTPS, DL, VT, Op0, Op1,
33694                            DAG.getTargetConstant(InsertPSMask, DL, MVT::i8));
33703         SDValue Load = DAG.getLoad(MVT::f32, DL, MemIntr->getChain(),
33706         SDValue Insert = DAG.getNode(X86ISD::INSERTPS, DL, VT, Op0,
33707                            DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VT,
33709                            DAG.getTargetConstant(InsertPSMask & 0x3f, DL, MVT::i8));
33710         DAG.ReplaceAllUsesOfValueWith(SDValue(MemIntr, 1), Load.getValue(1));
33743       V = DAG.getBitcast(DVT, V);
33744       V = DAG.getNode(X86ISD::PSHUFD, DL, DVT, V,
33745                       getV4X86ShuffleImm8ForMask(DMask, DL, DAG));
33746       return DAG.getBitcast(VT, V);
33775           V = DAG.getBitcast(VT, D.getOperand(0));
33776           return DAG.getNode(MappedMask[0] == 0 ? X86ISD::UNPCKL
33786     if (SDValue NewN = combineRedundantDWordShuffle(N, Mask, DAG))