reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
17552 return InsertBitToMaskVector(Op, DAG, Subtarget); 17575 SDValue CstVector = IsZeroElt ? getZeroVector(VT, Subtarget, DAG, dl) 17576 : getOnesVector(VT, DAG, dl); 17577 return DAG.getVectorShuffle(VT, dl, N0, CstVector, BlendMask); 17591 SDValue N1Vec = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, N1); 17592 return DAG.getNode(X86ISD::BLENDI, dl, VT, N0, N1Vec, 17593 DAG.getTargetConstant(1, dl, MVT::i8)); 17598 SDValue V = extract128BitVector(N0, IdxVal, DAG, dl); 17606 V = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, V.getValueType(), V, N1, 17607 DAG.getIntPtrConstant(IdxIn128, dl)); 17610 return insert128BitVector(N0, V, IdxVal, DAG, dl); 17618 N1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, N1); 17619 return getShuffleVectorZeroOrUndef(N1, 0, true, Subtarget, DAG); 17636 N1 = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i32, N1); 17638 N2 = DAG.getIntPtrConstant(IdxVal, dl); 17639 return DAG.getNode(Opc, dl, VT, N0, N1, N2); 17653 bool MinSize = DAG.getMachineFunction().getFunction().hasMinSize(); 17662 N1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v4f32, N1); 17663 return DAG.getNode(X86ISD::BLENDI, dl, VT, N0, N1, 17664 DAG.getTargetConstant(1, dl, MVT::i8)); 17667 N1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v4f32, N1); 17668 return DAG.getNode(X86ISD::INSERTPS, dl, VT, N0, N1, 17669 DAG.getTargetConstant(IdxVal << 4, dl, MVT::i8));