reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/X86/X86ISelLowering.cpp
36815   if (SDValue V = DAG.simplifySelect(Cond, LHS, RHS))
36819   EVT CondVT = Cond.getValueType();
36823   if (ISD::isBuildVectorOfConstantSDNodes(Cond.getNode()) &&
36826     if (createShuffleMaskFromVSELECT(Mask, Cond))
36835   if (Cond.getOpcode() == ISD::SETCC && VT.isFloatingPoint() &&
36840     ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
36844     if (DAG.isEqualTo(LHS, Cond.getOperand(0)) &&
36845         DAG.isEqualTo(RHS, Cond.getOperand(1))) {
36913     } else if (DAG.isEqualTo(LHS, Cond.getOperand(1)) &&
36914                DAG.isEqualTo(RHS, Cond.getOperand(0))) {
36990       Cond.getOpcode() == ISD::SETCC && (VT == MVT::f32 || VT == MVT::f64)) {
36991     ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
36992     SDValue AndNode = Cond.getOperand(0);
36994         isNullConstant(Cond.getOperand(1)) &&
37014     Cond = DAG.getNode(ISD::SIGN_EXTEND, DL, VT, Cond);
37014     Cond = DAG.getNode(ISD::SIGN_EXTEND, DL, VT, Cond);
37015     return DAG.getNode(N->getOpcode(), DL, VT, Cond, LHS, RHS);
37046       Cond = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, SrcCondVT,
37047                          DAG.getUNDEF(SrcCondVT), Cond,
37049       SDValue Res = DAG.getSelect(DL, SrcVT, Cond, LHS, RHS);
37072   if (N->getOpcode() == ISD::SELECT && Cond.getOpcode() == ISD::SETCC &&
37073       Cond.hasOneUse() &&
37074       DAG.isEqualTo(LHS, Cond.getOperand(0)) &&
37075       DAG.isEqualTo(RHS, Cond.getOperand(1))) {
37076     ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
37082       Cond = DAG.getSetCC(SDLoc(Cond), Cond.getValueType(),
37082       Cond = DAG.getSetCC(SDLoc(Cond), Cond.getValueType(),
37082       Cond = DAG.getSetCC(SDLoc(Cond), Cond.getValueType(),
37083                           Cond.getOperand(0), Cond.getOperand(1), NewCC);
37083                           Cond.getOperand(0), Cond.getOperand(1), NewCC);
37084       return DAG.getSelect(DL, VT, Cond, LHS, RHS);
37090   if (N->getOpcode() == ISD::VSELECT && Cond.getOpcode() == ISD::SETCC &&
37096     ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
37109         Other->getOperand(0) == Cond.getOperand(0)) {
37111       SDValue CondRHS = Cond->getOperand(1);
37159   if (N->getOpcode() == ISD::VSELECT && Cond.getOpcode() == ISD::SETCC &&
37165     ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
37167     SDValue CondLHS = Cond->getOperand(0);
37168     SDValue CondRHS = Cond->getOperand(1);
37226     if (SDValue CondNot = IsNOT(Cond, DAG))
37234     SDValue newSelect = DAG.getNode(ISD::SELECT, DL, MVT::i64, Cond, LHS, RHS);