reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
4350 MVT NVT = Node->getSimpleValueType(0); 4351 unsigned Opcode = Node->getOpcode(); 4352 SDLoc dl(Node); 4354 if (Node->isMachineOpcode()) { 4355 LLVM_DEBUG(dbgs() << "== "; Node->dump(CurDAG); dbgs() << '\n'); 4356 Node->setNodeId(-1); 4363 unsigned IntNo = Node->getConstantOperandVal(1); 4369 bool Use64BitPtr = Node->getOperand(2).getValueType() == MVT::i64; 4393 SDValue Chain = CurDAG->getCopyToReg(Node->getOperand(0), dl, PtrReg, 4394 Node->getOperand(2), SDValue()); 4400 Chain = CurDAG->getCopyToReg(Chain, dl, X86::ECX, Node->getOperand(3), 4403 Chain = CurDAG->getCopyToReg(Chain, dl, X86::EDX, Node->getOperand(4), 4410 ReplaceNode(Node, CNode); 4427 const SDValue &Target = Node->getOperand(1); 4431 Node->getOperand(0), ZextTarget); 4432 ReplaceNode(Node, Brind.getNode()); 4440 ReplaceNode(Node, getGlobalBaseReg()); 4447 ReplaceUses(SDValue(Node, 0), Node->getOperand(0)); 4447 ReplaceUses(SDValue(Node, 0), Node->getOperand(0)); 4448 CurDAG->RemoveDeadNode(Node); 4455 if (Node->getOperand(0).getValueType().getVectorElementType() == MVT::i1) 4460 X86ISD::BLENDV, SDLoc(Node), Node->getValueType(0), Node->getOperand(0), 4460 X86ISD::BLENDV, SDLoc(Node), Node->getValueType(0), Node->getOperand(0), 4460 X86ISD::BLENDV, SDLoc(Node), Node->getValueType(0), Node->getOperand(0), 4461 Node->getOperand(1), Node->getOperand(2)); 4461 Node->getOperand(1), Node->getOperand(2)); 4462 ReplaceNode(Node, Blendv.getNode()); 4469 if (matchBitExtract(Node)) 4474 if (tryShiftAmountMod(Node)) 4481 SDValue N0 = Node->getOperand(0); 4482 SDValue N1 = Node->getOperand(1); 4484 tryVPTESTM(Node, N0, N1)) 4487 tryVPTESTM(Node, N1, N0)) 4491 if (MachineSDNode *NewNode = matchBEXTRFromAndImm(Node)) { 4492 ReplaceUses(SDValue(Node, 0), SDValue(NewNode, 0)); 4493 CurDAG->RemoveDeadNode(Node); 4496 if (matchBitExtract(Node)) 4498 if (AndImmShrink && shrinkAndImmediate(Node)) 4504 if (tryShrinkShlLogicImm(Node)) 4507 if (Opcode == ISD::OR && tryMatchBitSelect(Node)) 4514 combineIncDecVector(Node)) 4530 SDValue N0 = Node->getOperand(0); 4531 SDValue N1 = Node->getOperand(1); 4603 if (tryFoldLoad(Node, N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) { 4611 ReplaceUses(SDValue(Node, 0), SDValue(CNode, 0)); 4612 CurDAG->RemoveDeadNode(Node); 4617 CurDAG->SelectNodeTo(Node, ROpc, NVT, MVT::i32, N0, N1); 4627 SDValue N0 = Node->getOperand(0); 4628 SDValue N1 = Node->getOperand(1); 4656 bool FoldedLoad = tryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); 4659 FoldedLoad = tryFoldLoad(Node, N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); 4697 ReplaceUses(SDValue(Node, 0), SDValue(CNode, 0)); 4698 ReplaceUses(SDValue(Node, 1), SDValue(CNode, NVT == MVT::i8 ? 1 : 2)); 4699 CurDAG->RemoveDeadNode(Node); 4705 SDValue N0 = Node->getOperand(0); 4706 SDValue N1 = Node->getOperand(1); 4738 bool foldedLoad = tryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); 4741 foldedLoad = tryFoldLoad(Node, N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); 4770 if (!SDValue(Node, 0).use_empty()) { 4775 ReplaceUses(SDValue(Node, 0), ResLo); 4780 if (!SDValue(Node, 1).use_empty()) { 4785 ReplaceUses(SDValue(Node, 1), ResHi); 4790 CurDAG->RemoveDeadNode(Node); 4796 SDValue N0 = Node->getOperand(0); 4797 SDValue N1 = Node->getOperand(1); 4843 bool foldedLoad = tryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); 4852 if (tryFoldLoad(Node, N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) { 4932 if (HiReg == X86::AH && !SDValue(Node, 1).use_empty()) { 4945 ReplaceUses(SDValue(Node, 1), Result); 4950 if (!SDValue(Node, 0).use_empty()) { 4954 ReplaceUses(SDValue(Node, 0), Result); 4959 if (!SDValue(Node, 1).use_empty()) { 4963 ReplaceUses(SDValue(Node, 1), Result); 4967 CurDAG->RemoveDeadNode(Node); 4972 SDValue N0 = Node->getOperand(0); 4973 SDValue N1 = Node->getOperand(1); 4992 ReplaceUses(SDValue(Node, 0), SDValue(NewNode, 0)); 4993 CurDAG->RemoveDeadNode(Node); 5016 onlyUsesZeroFlag(SDValue(Node, 0))) { 5025 ReplaceNode(Node, Test); 5036 ReplaceNode(Node, Test); 5052 hasNoSignFlagUses(SDValue(Node, 0)))) { 5060 hasNoSignFlagUses(SDValue(Node, 0)))) { 5075 hasNoSignFlagUses(SDValue(Node, 0)))) { 5096 if (tryFoldLoad(Node, N0.getNode(), Reg, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) { 5113 ReplaceNode(Node, NewNode); 5122 bool NeedIndex = !SDValue(Node, 0).use_empty(); 5123 bool NeedMask = !SDValue(Node, 1).use_empty(); 5131 CNode = emitPCMPISTR(ROpc, MOpc, MayFoldLoad, dl, MVT::v16i8, Node); 5132 ReplaceUses(SDValue(Node, 1), SDValue(CNode, 0)); 5137 CNode = emitPCMPISTR(ROpc, MOpc, MayFoldLoad, dl, MVT::i32, Node); 5138 ReplaceUses(SDValue(Node, 0), SDValue(CNode, 0)); 5142 ReplaceUses(SDValue(Node, 2), SDValue(CNode, 1)); 5143 CurDAG->RemoveDeadNode(Node); 5152 Node->getOperand(1), 5155 Node->getOperand(3), InFlag).getValue(1); 5157 bool NeedIndex = !SDValue(Node, 0).use_empty(); 5158 bool NeedMask = !SDValue(Node, 1).use_empty(); 5166 CNode = emitPCMPESTR(ROpc, MOpc, MayFoldLoad, dl, MVT::v16i8, Node, 5168 ReplaceUses(SDValue(Node, 1), SDValue(CNode, 0)); 5173 CNode = emitPCMPESTR(ROpc, MOpc, MayFoldLoad, dl, MVT::i32, Node, InFlag); 5174 ReplaceUses(SDValue(Node, 0), SDValue(CNode, 0)); 5177 ReplaceUses(SDValue(Node, 2), SDValue(CNode, 1)); 5178 CurDAG->RemoveDeadNode(Node); 5183 if (NVT.isVector() && tryVPTESTM(Node, SDValue(Node, 0), SDValue())) 5183 if (NVT.isVector() && tryVPTESTM(Node, SDValue(Node, 0), SDValue())) 5190 if (foldLoadStoreIntoMemOperand(Node)) 5205 switch (Node->getOpcode()) { 5213 SDLoc dl(Node); 5214 SDValue Res = CurDAG->getNode(X86ISD::VRNDSCALE, dl, Node->getValueType(0), 5215 Node->getOperand(0), 5217 ReplaceNode(Node, Res.getNode()); 5223 SelectCode(Node);