reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
4445 if (NVT.is512BitVector() || NVT.is256BitVector() || NVT.is128BitVector() || 4445 if (NVT.is512BitVector() || NVT.is256BitVector() || NVT.is128BitVector() || 4445 if (NVT.is512BitVector() || NVT.is256BitVector() || NVT.is128BitVector() || 4446 NVT == MVT::f128) { 4479 if (NVT.isVector() && NVT.getVectorElementType() == MVT::i1) { 4479 if (NVT.isVector() && NVT.getVectorElementType() == MVT::i1) { 4513 if ((Opcode == ISD::ADD || Opcode == ISD::SUB) && NVT.isVector() && 4527 if (NVT != MVT::i8 && NVT != MVT::i16 && NVT != MVT::i32 && NVT != MVT::i64) 4527 if (NVT != MVT::i8 && NVT != MVT::i16 && NVT != MVT::i32 && NVT != MVT::i64) 4527 if (NVT != MVT::i8 && NVT != MVT::i16 && NVT != MVT::i32 && NVT != MVT::i64) 4527 if (NVT != MVT::i8 && NVT != MVT::i16 && NVT != MVT::i32 && NVT != MVT::i64) 4554 switch (NVT.SimpleTy) { 4605 SDVTList VTs = CurDAG->getVTList(NVT, MVT::i32, MVT::Other); 4617 CurDAG->SelectNodeTo(Node, ROpc, NVT, MVT::i32, N0, N1); 4623 if (NVT != MVT::i8) 4631 switch (NVT.SimpleTy) { 4672 if (NVT == MVT::i8) 4673 VTs = CurDAG->getVTList(NVT, MVT::i32, MVT::Other); 4675 VTs = CurDAG->getVTList(NVT, NVT, MVT::i32, MVT::Other); 4675 VTs = CurDAG->getVTList(NVT, NVT, MVT::i32, MVT::Other); 4682 ReplaceUses(N1.getValue(1), SDValue(CNode, NVT == MVT::i8 ? 2 : 3)); 4689 if (NVT == MVT::i8) 4690 VTs = CurDAG->getVTList(NVT, MVT::i32); 4692 VTs = CurDAG->getVTList(NVT, NVT, MVT::i32); 4692 VTs = CurDAG->getVTList(NVT, NVT, MVT::i32); 4698 ReplaceUses(SDValue(Node, 1), SDValue(CNode, NVT == MVT::i8 ? 1 : 2)); 4711 switch (NVT.SimpleTy) { 4717 switch (NVT.SimpleTy) { 4773 NVT, InFlag); 4783 NVT, InFlag); 4802 switch (NVT.SimpleTy) { 4810 switch (NVT.SimpleTy) { 4821 switch (NVT.SimpleTy) { 4847 if (NVT == MVT::i8) { 4880 SDValue ClrNode = SDValue(CurDAG->getMachineNode(X86::MOV32r0, dl, NVT), 0); 4881 switch (NVT.SimpleTy) { 4952 LoReg, NVT, InFlag); 4961 HiReg, NVT, InFlag); 5183 if (NVT.isVector() && tryVPTESTM(Node, SDValue(Node, 0), SDValue()))