reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
  119 MCRegister getX86SubSuperRegister(MCRegister, unsigned, bool High=false);

References

lib/Target/X86/AsmParser/X86Operand.h
  505       RegNo = getX86SubSuperRegister(RegNo, 32);
lib/Target/X86/X86AsmPrinter.cpp
  250     Reg = getX86SubSuperRegister(Reg, Size);
  403     Reg = getX86SubSuperRegister(Reg, 8);
  406     Reg = getX86SubSuperRegister(Reg, 8, true);
  409     Reg = getX86SubSuperRegister(Reg, 16);
  412     Reg = getX86SubSuperRegister(Reg, 32);
  420     Reg = getX86SubSuperRegister(Reg, P.getSubtarget().is64Bit() ? 64 : 32);
lib/Target/X86/X86FixupBWInsts.cpp
  182   SuperDestReg = getX86SubSuperRegister(OrigDestReg, 32);
  203     if (!LiveRegs.contains(getX86SubSuperRegister(OrigDestReg, 16)) &&
  204         !LiveRegs.contains(getX86SubSuperRegister(SuperDestReg, 8,
  308   Register NewSrcReg = getX86SubSuperRegister(OldSrc.getReg(), 32);
lib/Target/X86/X86FrameLowering.cpp
 1001           ? Register(getX86SubSuperRegister(FramePtr, 64)) : FramePtr;
 1603       Is64BitILP32 ? Register(getX86SubSuperRegister(FramePtr, 64)) : FramePtr;
 2230       BasePtr = getX86SubSuperRegister(BasePtr, 64);
lib/Target/X86/X86InstrInfo.cpp
  737     NewSrc = getX86SubSuperRegister(Src.getReg(), 64);
 3954         .setReg(getX86SubSuperRegister(MIB->getOperand(0).getReg(), 64));
lib/Target/X86/X86MCInstLower.cpp
 1353       SrcRegs[I] = getX86SubSuperRegister(Op->getReg(), 64);
 1449       SrcRegs[I] = getX86SubSuperRegister(Op->getReg(), 64);
lib/Target/X86/X86RegisterInfo.cpp
  555     Register BasePtr = getX86SubSuperRegister(getBaseRegister(), 64);
  693     BasePtr = getX86SubSuperRegister(BasePtr, 32);
  759     MachineBasePtr = getX86SubSuperRegister(BasePtr, 64);
  803     FrameReg = getX86SubSuperRegister(FrameReg, 32);
  812     StackReg = getX86SubSuperRegister(StackReg, 32);