reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/X86/AsmParser/X86AsmParser.cpp
 2962       MRI->getEncodingValue(Inst.getOperand(3 + X86::AddrIndexReg).getReg());
 2994       MRI->getEncodingValue(Inst.getOperand(4 + X86::AddrIndexReg).getReg());
lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
  388   const MCOperand &IndexReg = MI->getOperand(Op + X86::AddrIndexReg);
  412       printOperand(MI, Op + X86::AddrIndexReg, O);
lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
  348   const MCOperand &IndexReg = MI->getOperand(Op+X86::AddrIndexReg);
  366     printOperand(MI, Op+X86::AddrIndexReg, O);
lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
   68     const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg);
  210   const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg);
  231   const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg);
  385   const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg);
  765     unsigned IndexRegEnc = getX86RegEncoding(MI, MemOperand+X86::AddrIndexReg);
  810     unsigned IndexRegEnc = getX86RegEncoding(MI, MemOperand+X86::AddrIndexReg);
  825     unsigned IndexRegEnc = getX86RegEncoding(MI, MemOperand+X86::AddrIndexReg);
  841     unsigned IndexRegEnc = getX86RegEncoding(MI, MemOperand+X86::AddrIndexReg);
  863     unsigned IndexRegEnc = getX86RegEncoding(MI, MemOperand+X86::AddrIndexReg);
 1089     REX |= isREXExtendedReg(MI, MemOperand+X86::AddrIndexReg) << 1; // REX.X
 1098     REX |= isREXExtendedReg(MI, MemOperand+X86::AddrIndexReg) << 1; // REX.X
 1108     REX |= isREXExtendedReg(MI, MemOperand+X86::AddrIndexReg) << 1; // REX.X
lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
  535   const MCOperand &IndexReg = Inst.getOperand(MemOpStart + X86::AddrIndexReg);
lib/Target/X86/X86AsmPrinter.cpp
  279   const MachineOperand &IndexReg = MI->getOperand(OpNo + X86::AddrIndexReg);
  319       PrintModifiedOperand(MI, OpNo + X86::AddrIndexReg, O, Modifier);
  343   const MachineOperand &IndexReg = MI->getOperand(OpNo + X86::AddrIndexReg);
  365     PrintOperand(MI, OpNo + X86::AddrIndexReg, O);
lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp
  315   MachineOperand &Index = MI->getOperand(AddrOffset + X86::AddrIndexReg);
lib/Target/X86/X86CallFrameOptimization.cpp
  431         (I->getOperand(X86::AddrIndexReg).getReg() != X86::NoRegister) ||
lib/Target/X86/X86FastISel.cpp
  231                                          X86::AddrIndexReg);
lib/Target/X86/X86FixupLEAs.cpp
  359   const MachineOperand &Index =   MI.getOperand(1 + X86::AddrIndexReg);
  454     MachineOperand &q = MI.getOperand(AddrOffset + X86::AddrIndexReg);
  488   const MachineOperand &Index =   MI.getOperand(1 + X86::AddrIndexReg);
  538   const MachineOperand &Index =   MI.getOperand(1 + X86::AddrIndexReg);
lib/Target/X86/X86InsertPrefetch.cpp
   83   Register IndexReg = MI.getOperand(Op + X86::AddrIndexReg).getReg();
  218                X86::AddrIndexReg == 2 && X86::AddrDisp == 3 &&
  229                 Current->getOperand(MemOpOffset + X86::AddrIndexReg).getReg())
lib/Target/X86/X86InstrInfo.cpp
  197       MI.getOperand(Op + X86::AddrIndexReg).isReg() &&
  200       MI.getOperand(Op + X86::AddrIndexReg).getReg() == 0 &&
  602         MI.getOperand(1 + X86::AddrIndexReg).isReg() &&
  603         MI.getOperand(1 + X86::AddrIndexReg).getReg() == 0 &&
  621         MI.getOperand(1 + X86::AddrIndexReg).isReg() &&
  622         MI.getOperand(1 + X86::AddrIndexReg).getReg() == 0 &&
 3212   if (MemOp.getOperand(MemRefBegin + X86::AddrIndexReg).getReg() !=
 5926       !HasSameOp(X86::AddrIndexReg) || !HasSameOp(X86::AddrSegmentReg))
lib/Target/X86/X86InstrInfo.h
  118          MI.getOperand(Op + X86::AddrIndexReg).isReg() &&
lib/Target/X86/X86MCInstLower.cpp
  357       Inst.getOperand(AddrBase + X86::AddrIndexReg).isReg() &&
  381        Inst.getOperand(AddrBase + X86::AddrIndexReg).getReg() != 0))
lib/Target/X86/X86OptimizeLEAs.cpp
  193                   &MI.getOperand(N + X86::AddrIndexReg),
  555     MI.getOperand(MemOpNo + X86::AddrIndexReg)
lib/Target/X86/X86SpeculativeLoadHardening.cpp
 1715             MI.getOperand(MemRefBeginIdx + X86::AddrIndexReg);
 1788               MI.getOperand(MemRefBeginIdx + X86::AddrIndexReg);
 2186             UseMI.getOperand(MemRefBeginIdx + X86::AddrIndexReg);