reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
 1729   dbgprintf(insn, "readOperands()");
 1733   hasVVVV = !readVVVV(insn);
 1734   needVVVV = hasVVVV && (insn->vvvv != 0);
 1736   for (const auto &Op : x86OperandSets[insn->spec->operands]) {
 1745         needVVVV = hasVVVV & ((insn->vvvv & 0xf) != 0);
 1746       if (readModRM(insn))
 1750       if (insn->eaBase != EA_BASE_sib && insn->eaBase != EA_BASE_sib64)
 1750       if (insn->eaBase != EA_BASE_sib && insn->eaBase != EA_BASE_sib64)
 1754       if (insn->sibIndex == SIB_INDEX_NONE)
 1755         insn->sibIndex = (SIBIndex)(insn->sibIndexBase + 4);
 1755         insn->sibIndex = (SIBIndex)(insn->sibIndexBase + 4);
 1758       if (insn->vectorExtensionType == TYPE_EVEX && insn->mode == MODE_64BIT &&
 1758       if (insn->vectorExtensionType == TYPE_EVEX && insn->mode == MODE_64BIT &&
 1759           v2FromEVEX4of4(insn->vectorExtensionPrefix[3]))
 1760         insn->sibIndex = (SIBIndex)(insn->sibIndex + 16);
 1760         insn->sibIndex = (SIBIndex)(insn->sibIndex + 16);
 1768         insn->sibIndex = (SIBIndex)(SIB_INDEX_XMM0 +
 1769                                     (insn->sibIndex - insn->sibIndexBase));
 1769                                     (insn->sibIndex - insn->sibIndexBase));
 1772         insn->sibIndex = (SIBIndex)(SIB_INDEX_YMM0 +
 1773                                     (insn->sibIndex - insn->sibIndexBase));
 1773                                     (insn->sibIndex - insn->sibIndexBase));
 1776         insn->sibIndex = (SIBIndex)(SIB_INDEX_ZMM0 +
 1777                                     (insn->sibIndex - insn->sibIndexBase));
 1777                                     (insn->sibIndex - insn->sibIndexBase));
 1782       if (Op.encoding != ENCODING_REG && insn->eaDisplacement == EA_DISP_8)
 1783         insn->displacement *= 1 << (Op.encoding - ENCODING_VSIB);
 1787       if (readModRM(insn))
 1789       if (fixupReg(insn, &Op))
 1792       if (Op.encoding != ENCODING_REG && insn->eaDisplacement == EA_DISP_8)
 1793         insn->displacement *= 1 << (Op.encoding - ENCODING_RM);
 1799         insn->immediates[insn->numImmediatesConsumed] =
 1799         insn->immediates[insn->numImmediatesConsumed] =
 1800           insn->immediates[insn->numImmediatesConsumed - 1] & 0xf;
 1800           insn->immediates[insn->numImmediatesConsumed - 1] & 0xf;
 1801         ++insn->numImmediatesConsumed;
 1804       if (readImmediate(insn, 1))
 1810       if (readImmediate(insn, 2))
 1814       if (readImmediate(insn, 4))
 1818       if (readImmediate(insn, 8))
 1822       if (readImmediate(insn, insn->immediateSize))
 1822       if (readImmediate(insn, insn->immediateSize))
 1826       if (readImmediate(insn, insn->addressSize))
 1826       if (readImmediate(insn, insn->addressSize))
 1830       insn->RC = (l2FromEVEX4of4(insn->vectorExtensionPrefix[3]) << 1) |
 1830       insn->RC = (l2FromEVEX4of4(insn->vectorExtensionPrefix[3]) << 1) |
 1831                  lFromEVEX4of4(insn->vectorExtensionPrefix[3]);
 1834       if (readOpcodeRegister(insn, 1))
 1838       if (readOpcodeRegister(insn, 2))
 1842       if (readOpcodeRegister(insn, 4))
 1846       if (readOpcodeRegister(insn, 8))
 1850       if (readOpcodeRegister(insn, 0))
 1854       insn->immediates[1] = insn->opcode & 0xf;
 1854       insn->immediates[1] = insn->opcode & 0xf;
 1862       if (insn->mode != MODE_64BIT)
 1863         insn->vvvv = static_cast<Reg>(insn->vvvv & 0x7);
 1863         insn->vvvv = static_cast<Reg>(insn->vvvv & 0x7);
 1864       if (fixupReg(insn, &Op))
 1868       if (readMaskRegister(insn))
 1874       dbgprintf(insn, "Encountered an operand with an unknown encoding.");