reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
1184 assert(MI.getOpcode() == RISCV::BuildPairF64Pseudo && 1188 DebugLoc DL = MI.getDebugLoc(); 1191 Register DstReg = MI.getOperand(0).getReg(); 1192 Register LoReg = MI.getOperand(1).getReg(); 1193 Register HiReg = MI.getOperand(2).getReg(); 1200 BuildMI(*BB, MI, DL, TII.get(RISCV::SW)) 1201 .addReg(LoReg, getKillRegState(MI.getOperand(1).isKill())) 1205 BuildMI(*BB, MI, DL, TII.get(RISCV::SW)) 1206 .addReg(HiReg, getKillRegState(MI.getOperand(2).isKill())) 1210 TII.loadRegFromStackSlot(*BB, MI, DstReg, FI, DstRC, RI); 1211 MI.eraseFromParent(); // The pseudo instruction is gone now.