reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/RISCV/RISCVISelLowering.cpp
 1153   assert(MI.getOpcode() == RISCV::SplitF64Pseudo && "Unexpected instruction");
 1156   DebugLoc DL = MI.getDebugLoc();
 1159   Register LoReg = MI.getOperand(0).getReg();
 1160   Register HiReg = MI.getOperand(1).getReg();
 1161   Register SrcReg = MI.getOperand(2).getReg();
 1165   TII.storeRegToStackSlot(*BB, MI, SrcReg, MI.getOperand(2).isKill(), FI, SrcRC,
 1165   TII.storeRegToStackSlot(*BB, MI, SrcReg, MI.getOperand(2).isKill(), FI, SrcRC,
 1170   BuildMI(*BB, MI, DL, TII.get(RISCV::LW), LoReg)
 1174   BuildMI(*BB, MI, DL, TII.get(RISCV::LW), HiReg)
 1178   MI.eraseFromParent(); // The pseudo instruction is gone now.