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|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
lib/Target/PowerPC/PPCISelLowering.cpp 9930 SDValue Zero = BuildSplatI( 0, 1, MVT::v4i32, DAG, dl);
9931 SDValue Neg16 = BuildSplatI(-16, 4, MVT::v4i32, DAG, dl);//+16 as shift amt.
9934 BuildIntrinsicOp(Intrinsic::ppc_altivec_vrlw, RHS, Neg16, DAG, dl);
9937 LHS = DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, LHS);
9938 RHS = DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, RHS);
9939 RHSSwap = DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, RHSSwap);
9944 LHS, RHS, DAG, dl, MVT::v4i32);
9947 LHS, RHSSwap, Zero, DAG, dl, MVT::v4i32);
9950 Neg16, DAG, dl);
9951 return DAG.getNode(ISD::ADD, dl, MVT::v4i32, LoProd, HiProd);
9955 SDValue Zero = BuildSplatI(0, 1, MVT::v8i16, DAG, dl);
9958 LHS, RHS, Zero, DAG, dl);
9965 LHS, RHS, DAG, dl, MVT::v8i16);
9966 EvenParts = DAG.getNode(ISD::BITCAST, dl, MVT::v16i8, EvenParts);
9970 LHS, RHS, DAG, dl, MVT::v8i16);
9971 OddParts = DAG.getNode(ISD::BITCAST, dl, MVT::v16i8, OddParts);
9988 return DAG.getVectorShuffle(MVT::v16i8, dl, OddParts, EvenParts, Ops);
9990 return DAG.getVectorShuffle(MVT::v16i8, dl, EvenParts, OddParts, Ops);