|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
lib/Target/PowerPC/PPCISelLowering.cpp10900 TII->insertSelect(*BB, MI, dl, MI.getOperand(0).getReg(), Cond,
10968 BuildMI(BB, dl, TII->get(PPC::BC))
10973 BuildMI(BB, dl, TII->get(PPC::BCC))
10991 BuildMI(*BB, BB->begin(), dl, TII->get(PPC::PHI), MI.getOperand(0).getReg())
11028 BuildMI(BB, dl, TII->get(PPC::MFSPR), HiReg).addImm(269);
11029 BuildMI(BB, dl, TII->get(PPC::MFSPR), LoReg).addImm(268);
11030 BuildMI(BB, dl, TII->get(PPC::MFSPR), ReadAgainReg).addImm(269);
11034 BuildMI(BB, dl, TII->get(PPC::CMPW), CmpReg)
11037 BuildMI(BB, dl, TII->get(PPC::BCC))
11210 BuildMI(BB, dl, TII->get(LoadMnemonic), dest).addReg(ptrA).addReg(ptrB);
11211 BuildMI(BB, dl, TII->get(is64bit ? PPC::CMPD : PPC::CMPW), PPC::CR0)
11214 BuildMI(BB, dl, TII->get(PPC::BCC))
11222 BuildMI(BB, dl, TII->get(StoreMnemonic))
11226 BuildMI(BB, dl, TII->get(PPC::BCC))
11230 BuildMI(BB, dl, TII->get(PPC::B)).addMBB(exitMBB);
11235 BuildMI(BB, dl, TII->get(StoreMnemonic))
11328 BuildMI(BB, dl, TII->get(is64bit ? PPC::ADD8 : PPC::ADD4), Ptr1Reg)
11337 BuildMI(BB, dl, TII->get(PPC::RLWINM), Shift1Reg)
11343 BuildMI(BB, dl, TII->get(PPC::XORI), ShiftReg)
11347 BuildMI(BB, dl, TII->get(PPC::RLDICR), PtrReg)
11352 BuildMI(BB, dl, TII->get(PPC::RLWINM), PtrReg)
11357 BuildMI(BB, dl, TII->get(PPC::SLW), NewVal2Reg)
11360 BuildMI(BB, dl, TII->get(PPC::SLW), OldVal2Reg)
11364 BuildMI(BB, dl, TII->get(PPC::LI), Mask2Reg).addImm(255);
11366 BuildMI(BB, dl, TII->get(PPC::LI), Mask3Reg).addImm(0);
11367 BuildMI(BB, dl, TII->get(PPC::ORI), Mask2Reg)
11371 BuildMI(BB, dl, TII->get(PPC::SLW), MaskReg)
11374 BuildMI(BB, dl, TII->get(PPC::AND), NewVal3Reg)
11377 BuildMI(BB, dl, TII->get(PPC::AND), OldVal3Reg)
11382 BuildMI(BB, dl, TII->get(PPC::LWARX), TmpDestReg)
11385 BuildMI(BB, dl, TII->get(PPC::AND), TmpReg)
11388 BuildMI(BB, dl, TII->get(PPC::CMPW), PPC::CR0)
11391 BuildMI(BB, dl, TII->get(PPC::BCC))
11399 BuildMI(BB, dl, TII->get(PPC::ANDC), Tmp2Reg)
11402 BuildMI(BB, dl, TII->get(PPC::OR), Tmp4Reg)
11405 BuildMI(BB, dl, TII->get(PPC::STWCX))
11409 BuildMI(BB, dl, TII->get(PPC::BCC))
11413 BuildMI(BB, dl, TII->get(PPC::B)).addMBB(exitMBB);
11418 BuildMI(BB, dl, TII->get(PPC::STWCX))
11427 BuildMI(*BB, BB->begin(), dl, TII->get(PPC::SRW), dest)
11443 BuildMI(*BB, MI, dl, TII->get(PPC::MFFS), MFFSReg);
11446 BuildMI(*BB, MI, dl, TII->get(PPC::MTFSB1)).addImm(31);
11447 BuildMI(*BB, MI, dl, TII->get(PPC::MTFSB0)).addImm(30);
11450 BuildMI(*BB, MI, dl, TII->get(PPC::FADD), Dest).addReg(Src1).addReg(Src2);
11453 BuildMI(*BB, MI, dl, TII->get(PPC::MTFSFb)).addImm(1).addReg(MFFSReg);
11470 BuildMI(*BB, MI, dl, TII->get(Opcode), Dest)
11473 BuildMI(*BB, MI, dl, TII->get(TargetOpcode::COPY),
11480 BuildMI(*BB, MI, Dl, TII->get(PPC::TCHECK), CRReg);
11481 BuildMI(*BB, MI, Dl, TII->get(TargetOpcode::COPY),
11487 BuildMI(*BB, MI, Dl, TII->get(PPC::TBEGIN)).addImm(Imm);
11488 BuildMI(*BB, MI, Dl, TII->get(TargetOpcode::COPY),
11496 BuildMI(*BB, MI, dl, TII->get(PPC::MFFS), OldFPSCRReg);
11508 BuildMI(*BB, MI, dl, TII->get((Mode & 1) ? PPC::MTFSB1 : PPC::MTFSB0))
11511 BuildMI(*BB, MI, dl, TII->get((Mode & 2) ? PPC::MTFSB1 : PPC::MTFSB0))
11523 BuildMI(*BB, MI, dl, TII->get(TargetOpcode::COPY), DestReg)
11553 BuildMI(*BB, MI, dl, TII->get(StoreOp))
11567 BuildMI(*BB, MI, dl, TII->get(LoadOp), DestReg)
11577 BuildMI(*BB, MI, dl, TII->get(PPC::MFFS), OldFPSCRReg);
11599 BuildMI(*BB, MI, dl, TII->get(TargetOpcode::IMPLICIT_DEF), ImDefReg);
11600 BuildMI(*BB, MI, dl, TII->get(PPC::INSERT_SUBREG), ExtSrcReg)
11606 BuildMI(*BB, MI, dl, TII->get(PPC::RLDIMI), NewFPSCRTmpReg)
11617 BuildMI(*BB, MI, dl, TII->get(PPC::MTFSF))