reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/PowerPC/PPCISelLowering.cpp
12713   assert(N->getOpcode() == ISD::BUILD_VECTOR &&
12716   SDLoc dl(N);
12719   if (!N->getValueType(0).getVectorElementType().isByteSized())
12724   unsigned ElemSize = N->getValueType(0).getScalarType().getStoreSize();
12725   SDValue FirstInput = N->getOperand(0);
12735       N->getNumOperands() == 1)
12738   for (int i = 1, e = N->getNumOperands(); i < e; ++i) {
12740     if (IsRoundOfExtLoad && N->getOperand(i).getOpcode() != ISD::FP_ROUND)
12743     SDValue NextInput = IsRoundOfExtLoad ? N->getOperand(i).getOperand(0) :
12744       N->getOperand(i);
12749       IsRoundOfExtLoad ? N->getOperand(i-1).getOperand(0) : N->getOperand(i-1);
12749       IsRoundOfExtLoad ? N->getOperand(i-1).getOperand(0) : N->getOperand(i-1);
12773     IsRoundOfExtLoad ? N->getOperand(N->getNumOperands()-1).getOperand(0) :
12773     IsRoundOfExtLoad ? N->getOperand(N->getNumOperands()-1).getOperand(0) :
12774                        N->getOperand(N->getNumOperands()-1);
12774                        N->getOperand(N->getNumOperands()-1);
12780     return DAG.getLoad(N->getValueType(0), dl, LD1->getChain(),
12786     SDValue Load = DAG.getLoad(N->getValueType(0), dl, LDL->getChain(),
12790     for (int i = N->getNumOperands() - 1; i >= 0; i--)
12793     return DAG.getVectorShuffle(N->getValueType(0), dl, Load,
12794                                 DAG.getUNDEF(N->getValueType(0)), Ops);