reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
12299 SDLoc dl(N); 12315 if (N->getValueType(0) != MVT::i32 && 12316 N->getValueType(0) != MVT::i64) 12319 if (!((N->getOperand(0).getValueType() == MVT::i1 && Subtarget.useCRBits()) || 12320 (N->getOperand(0).getValueType() == MVT::i32 && Subtarget.isPPC64()))) 12323 if (N->getOperand(0).getOpcode() != ISD::AND && 12324 N->getOperand(0).getOpcode() != ISD::OR && 12325 N->getOperand(0).getOpcode() != ISD::XOR && 12326 N->getOperand(0).getOpcode() != ISD::SELECT && 12327 N->getOperand(0).getOpcode() != ISD::SELECT_CC) 12331 SmallVector<SDValue, 8> BinOps(1, N->getOperand(0)), PromOps; 12384 if (User != N && !Visited.count(User)) 12409 if (User != N && !Visited.count(User)) 12429 unsigned PromBits = N->getOperand(0).getValueSizeInBits(); 12431 if (N->getOpcode() != ISD::ANY_EXTEND) { 12442 if ((N->getOpcode() == ISD::ZERO_EXTEND && 12446 (N->getOpcode() == ISD::SIGN_EXTEND && 12465 if (Inputs[i].getValueType() == N->getValueType(0)) 12467 else if (N->getOpcode() == ISD::SIGN_EXTEND) 12469 DAG.getSExtOrTrunc(InSrc, dl, N->getValueType(0))); 12470 else if (N->getOpcode() == ISD::ZERO_EXTEND) 12472 DAG.getZExtOrTrunc(InSrc, dl, N->getValueType(0))); 12475 DAG.getAnyExtOrTrunc(InSrc, dl, N->getValueType(0))); 12498 PromOp.getOperand(C).getValueType() != N->getValueType(0)) || 12500 PromOp.getOperand(C+1).getValueType() != N->getValueType(0))) { 12514 PromOp.getOperand(0).getValueType() != N->getValueType(0)) || 12516 PromOp.getOperand(1).getValueType() != N->getValueType(0))) { 12529 if (Ops[C+i].getValueType() == N->getValueType(0)) 12532 if (N->getOpcode() == ISD::SIGN_EXTEND) 12533 Ops[C+i] = DAG.getSExtOrTrunc(Ops[C+i], dl, N->getValueType(0)); 12534 else if (N->getOpcode() == ISD::ZERO_EXTEND) 12535 Ops[C+i] = DAG.getZExtOrTrunc(Ops[C+i], dl, N->getValueType(0)); 12537 Ops[C+i] = DAG.getAnyExtOrTrunc(Ops[C+i], dl, N->getValueType(0)); 12553 DAG.getNode(PromOp.getOpcode(), dl, N->getValueType(0), Ops)); 12558 return N->getOperand(0); 12562 if (N->getOpcode() == ISD::ZERO_EXTEND) 12563 return DAG.getNode(ISD::AND, dl, N->getValueType(0), N->getOperand(0), 12563 return DAG.getNode(ISD::AND, dl, N->getValueType(0), N->getOperand(0), 12565 N->getValueSizeInBits(0), PromBits), 12566 dl, N->getValueType(0))); 12568 assert(N->getOpcode() == ISD::SIGN_EXTEND && 12570 EVT ShiftAmountTy = getShiftAmountTy(N->getValueType(0), DAG.getDataLayout()); 12572 DAG.getConstant(N->getValueSizeInBits(0) - PromBits, dl, ShiftAmountTy); 12574 ISD::SRA, dl, N->getValueType(0), 12575 DAG.getNode(ISD::SHL, dl, N->getValueType(0), N->getOperand(0), ShiftCst), 12575 DAG.getNode(ISD::SHL, dl, N->getValueType(0), N->getOperand(0), ShiftCst),