|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
lib/Target/PowerPC/PPCISelLowering.cpp 7243 if (Subtarget.hasP9Vector() && LHS == TV && RHS == FV) {
7252 return DAG.getNode(PPCISD::XSMAXCDP, dl, Op.getValueType(), LHS, RHS);
7255 return DAG.getNode(PPCISD::XSMINCDP, dl, Op.getValueType(), LHS, RHS);
7274 if (LHS.getValueType() == MVT::f32) // Comparison is always 64-bits
7275 LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, LHS);
7275 LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, LHS);
7276 Sel1 = DAG.getNode(PPCISD::FSEL, dl, ResVT, LHS, TV, FV);
7280 DAG.getNode(ISD::FNEG, dl, MVT::f64, LHS), Sel1, FV);
7287 if (LHS.getValueType() == MVT::f32) // Comparison is always 64-bits
7288 LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, LHS);
7288 LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, LHS);
7289 return DAG.getNode(PPCISD::FSEL, dl, ResVT, LHS, TV, FV);
7296 if (LHS.getValueType() == MVT::f32) // Comparison is always 64-bits
7297 LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, LHS);
7297 LHS = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f64, LHS);
7299 DAG.getNode(ISD::FNEG, dl, MVT::f64, LHS), TV, FV);
7309 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, LHS, RHS, Flags);
7319 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, LHS, RHS, Flags);
7325 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, LHS, RHS, Flags);
7331 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, RHS, LHS, Flags);
7337 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, RHS, LHS, Flags);