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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
lib/Target/PowerPC/PPCISelLowering.cpp 7705 return LowerINT_TO_FPVector(Op, DAG, dl);
7719 Value = DAG.getNode(PPCISD::QBFLT, dl, MVT::v4f64, Value);
7721 SDValue FPHalfs = DAG.getConstantFP(0.5, dl, MVT::v4f64);
7723 Value = DAG.getNode(ISD::FMA, dl, MVT::v4f64, Value, FPHalfs, FPHalfs);
7726 Value = DAG.getNode(ISD::FP_ROUND, dl,
7728 DAG.getIntPtrConstant(1, dl));
7737 return DAG.getNode(ISD::SELECT, dl, Op.getValueType(), Op.getOperand(0),
7738 DAG.getConstantFP(1.0, dl, Op.getValueType()),
7739 DAG.getConstantFP(0.0, dl, Op.getValueType()));
7745 return LowerINT_TO_FPDirectMove(Op, DAG, dl);
7775 !DAG.getTarget().Options.UnsafeFPMath) {
7783 SDValue Round = DAG.getNode(ISD::AND, dl, MVT::i64,
7784 SINT, DAG.getConstant(2047, dl, MVT::i64));
7785 Round = DAG.getNode(ISD::ADD, dl, MVT::i64,
7786 Round, DAG.getConstant(2047, dl, MVT::i64));
7787 Round = DAG.getNode(ISD::OR, dl, MVT::i64, Round, SINT);
7788 Round = DAG.getNode(ISD::AND, dl, MVT::i64,
7789 Round, DAG.getConstant(-2048, dl, MVT::i64));
7799 SDValue Cond = DAG.getNode(ISD::SRA, dl, MVT::i64,
7800 SINT, DAG.getConstant(53, dl, MVT::i32));
7801 Cond = DAG.getNode(ISD::ADD, dl, MVT::i64,
7802 Cond, DAG.getConstant(1, dl, MVT::i64));
7803 Cond = DAG.getSetCC(dl, MVT::i32,
7804 Cond, DAG.getConstant(1, dl, MVT::i64), ISD::SETUGT);
7806 SINT = DAG.getNode(ISD::SELECT, dl, MVT::i64, Cond, Round, SINT);
7812 MachineFunction &MF = DAG.getMachineFunction();
7813 if (canReuseLoadAddress(SINT, MVT::i64, RLI, DAG)) {
7814 Bits = DAG.getLoad(MVT::f64, dl, RLI.Chain, RLI.Ptr, RLI.MPI,
7816 spliceIntoChain(RLI.ResChain, Bits.getValue(1), DAG);
7818 canReuseLoadAddress(SINT, MVT::i32, RLI, DAG, ISD::SEXTLOAD)) {
7823 Bits = DAG.getMemIntrinsicNode(PPCISD::LFIWAX, dl,
7824 DAG.getVTList(MVT::f64, MVT::Other),
7826 spliceIntoChain(RLI.ResChain, Bits.getValue(1), DAG);
7828 canReuseLoadAddress(SINT, MVT::i32, RLI, DAG, ISD::ZEXTLOAD)) {
7833 Bits = DAG.getMemIntrinsicNode(PPCISD::LFIWZX, dl,
7834 DAG.getVTList(MVT::f64, MVT::Other),
7836 spliceIntoChain(RLI.ResChain, Bits.getValue(1), DAG);
7843 EVT PtrVT = getPointerTy(DAG.getDataLayout());
7846 SDValue FIdx = DAG.getFrameIndex(FrameIdx, PtrVT);
7849 DAG.getStore(DAG.getEntryNode(), dl, SINT.getOperand(0), FIdx,
7849 DAG.getStore(DAG.getEntryNode(), dl, SINT.getOperand(0), FIdx,
7851 DAG.getMachineFunction(), FrameIdx));
7859 MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), FrameIdx);
7866 Bits = DAG.getMemIntrinsicNode(SINT.getOpcode() == ISD::ZERO_EXTEND ?
7868 dl, DAG.getVTList(MVT::f64, MVT::Other),
7871 Bits = DAG.getNode(ISD::BITCAST, dl, MVT::f64, SINT);
7873 SDValue FP = DAG.getNode(FCFOp, dl, FCFTy, Bits);
7876 FP = DAG.getNode(ISD::FP_ROUND, dl,
7877 MVT::f32, FP, DAG.getIntPtrConstant(0, dl));
7887 MachineFunction &MF = DAG.getMachineFunction();
7896 DAG))) {
7898 SDValue FIdx = DAG.getFrameIndex(FrameIdx, PtrVT);
7901 DAG.getStore(DAG.getEntryNode(), dl, Op.getOperand(0), FIdx,
7901 DAG.getStore(DAG.getEntryNode(), dl, Op.getOperand(0), FIdx,
7903 DAG.getMachineFunction(), FrameIdx));
7911 MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), FrameIdx);
7919 Ld = DAG.getMemIntrinsicNode(Op.getOpcode() == ISD::UINT_TO_FP ?
7921 dl, DAG.getVTList(MVT::f64, MVT::Other),
7924 spliceIntoChain(RLI.ResChain, Ld.getValue(1), DAG);
7930 SDValue FIdx = DAG.getFrameIndex(FrameIdx, PtrVT);
7932 SDValue Ext64 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i64,
7936 SDValue Store = DAG.getStore(
7937 DAG.getEntryNode(), dl, Ext64, FIdx,
7938 MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), FrameIdx));
7941 Ld = DAG.getLoad(
7943 MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), FrameIdx));
7947 SDValue FP = DAG.getNode(FCFOp, dl, FCFTy, Ld);
7949 FP = DAG.getNode(ISD::FP_ROUND, dl, MVT::f32, FP,
7950 DAG.getIntPtrConstant(0, dl));