reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
299 MBBInfos[I].Size += TII->getInstSizeInBytes(*MI); 337 unsigned NewOpc = TII->getOppositeBranchOpc(Br->getOpcode()); 338 const MCInstrDesc &NewDesc = TII->get(NewOpc); 387 BuildMI(*MBB, Pos, DL, TII->get(JumpOp)).addReg(ATReg); 456 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) 459 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SW)) 480 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi), Mips::AT) 485 BuildMI(*MFp, DL, TII->get(BalOp)).addMBB(BalTgtMBB); 487 BuildMI(*MFp, DL, TII->get(Mips::LONG_BRANCH_ADDiu), Mips::AT) 502 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDu), Mips::AT) 505 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LW), Mips::RA) 517 BuildMI(*BalTgtMBB, std::prev(Pos), DL, TII->get(Mips::ADDiu), Mips::SP) 523 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::NOP)); 525 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) 579 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::SP_64) 582 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SD)) 586 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu), 591 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) 596 BuildMI(*MFp, DL, TII->get(BalOp)).addMBB(BalTgtMBB); 598 BuildMI(*MFp, DL, TII->get(Mips::LONG_BRANCH_DADDiu), Mips::AT_64) 613 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::DADDu), Mips::AT_64) 616 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LD), Mips::RA_64) 623 BuildMI(*BalTgtMBB, std::prev(Pos), DL, TII->get(Mips::DADDiu), 628 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::SP_64) 650 if (STI->hasMips32r6() && TII->isBranchOffsetInRange(Mips::BC, I.Offset)) { 657 TII->get(STI->inMicroMipsMode() ? Mips::BC_MMR6 : Mips::BC)) 667 .append(BuildMI(*MFp, DL, TII->get(Mips::J)).addMBB(TgtMBB)) 668 .append(BuildMI(*MFp, DL, TII->get(Mips::NOP))); 676 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi2Op_64), 679 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu2Op), 683 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) 686 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu2Op), 690 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) 693 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu2Op), 698 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi2Op), 701 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_ADDiu2Op), 743 if (!TII->HasForbiddenSlot(*I)) 755 if (LastInstInFunction || !TII->SafeInForbiddenSlot(*Inst)) { 762 BuildMI(*MFp, I->getDebugLoc(), TII->get(Mips::NOP))); 806 !TII->isBranchOffsetInRange(Br->getOpcode(), Offset)) { 839 TII = static_cast<const MipsInstrInfo *>(STI->getInstrInfo()); 843 emitGPDisp(MF, TII);