reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

lib/Target/Mips/MipsTargetStreamer.h

  127   void emitRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, SMLoc IDLoc,

References

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

 3319     TOut.emitRR(Mips::MTC1, FirstReg, TmpReg, IDLoc, STI);
 3439       TOut.emitRR(Mips::DMTC1, FirstReg, TmpReg, IDLoc, STI);
 3449       TOut.emitRR(Mips::MTC1, FirstReg, Mips::ZERO, IDLoc, STI);
 3452       TOut.emitRR(Mips::MTC1, nextReg(FirstReg), TmpReg, IDLoc, STI);
 3453       TOut.emitRR(Mips::MTC1, FirstReg, Mips::ZERO, IDLoc, STI);
 4094       TOut.emitRR(DivOp, RsReg, ATReg, IDLoc, STI);
 4117     TOut.emitRR(DivOp, RsReg, RtReg, IDLoc, STI);
 4135   TOut.emitRR(DivOp, RsReg, RtReg, IDLoc, STI);
 4203     TOut.emitRR(Mips::CFC1, ThirdReg, Mips::RA, IDLoc, STI);
 4204     TOut.emitRR(Mips::CFC1, ThirdReg, Mips::RA, IDLoc, STI);
 4208     TOut.emitRR(Mips::CTC1, Mips::RA, ATReg, IDLoc, STI);
 4210     TOut.emitRR(IsDouble ? (Is64FPU ? Mips::CVT_W_D64 : Mips::CVT_W_D32)
 4213     TOut.emitRR(Mips::CTC1, Mips::RA, ThirdReg, IDLoc, STI);
 4218   TOut.emitRR(IsDouble ? (Is64FPU ? Mips::TRUNC_W_D64 : Mips::TRUNC_W_D32)
 4940   TOut.emitRR(Inst.getOpcode() == Mips::MULImmMacro ? Mips::MULT : Mips::DMULT,
 4960   TOut.emitRR(Inst.getOpcode() == Mips::MULOMacro ? Mips::MULT : Mips::DMULT,
 5002   TOut.emitRR(Inst.getOpcode() == Mips::MULOUMacro ? Mips::MULTu : Mips::DMULTu,
 5033   TOut.emitRR(Mips::DMULTu, SrcReg, TmpReg, IDLoc, STI);

lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp

  283     emitRR(Mips::MOVE16_MM, Mips::ZERO, Mips::ZERO, IDLoc, STI);
  290     emitRR(Mips::MOVE16_MM, Mips::ZERO, Mips::ZERO, IDLoc, STI);