reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
1022 MachineBasicBlock &MBB = *MI.getParent(); 1026 DebugLoc DL = MI.getDebugLoc(); 1027 unsigned Opc = MI.getOpcode(); 1030 Register Mx = MI.getOperand(MxOp).getReg(); 1032 BuildMI(MBB, MI, DL, get(Hexagon::A2_tfrrcr), CSx) 1033 .add(MI.getOperand((HasImm ? 5 : 4))); 1034 auto MIB = BuildMI(MBB, MI, DL, get(Opc)).add(MI.getOperand(0)) 1034 auto MIB = BuildMI(MBB, MI, DL, get(Opc)).add(MI.getOperand(0)) 1035 .add(MI.getOperand(1)).add(MI.getOperand(2)).add(MI.getOperand(3)); 1035 .add(MI.getOperand(1)).add(MI.getOperand(2)).add(MI.getOperand(3)); 1035 .add(MI.getOperand(1)).add(MI.getOperand(2)).add(MI.getOperand(3)); 1037 MIB.add(MI.getOperand(4)); 1039 MBB.erase(MI); 1045 MachineOperand &MD = MI.getOperand(0); 1046 MachineOperand &MS = MI.getOperand(1); 1047 MachineBasicBlock::iterator MBBI = MI.getIterator(); 1049 copyPhysReg(MBB, MI, DL, MD.getReg(), MS.getReg(), MS.isKill()); 1050 std::prev(MBBI)->copyImplicitOps(*MBB.getParent(), MI); 1056 BuildMI(MBB, MI, DL, get(Hexagon::A2_andir), MI.getOperand(0).getReg()) 1056 BuildMI(MBB, MI, DL, get(Hexagon::A2_andir), MI.getOperand(0).getReg()) 1058 .addImm(-MI.getOperand(1).getImm()); 1059 MBB.erase(MI); 1062 Register SrcReg = MI.getOperand(1).getReg(); 1063 Register DstReg = MI.getOperand(0).getReg(); 1064 unsigned Kill = getKillRegState(MI.getOperand(1).isKill()); 1065 BuildMI(MBB, MI, DL, get(Hexagon::V6_vcombine), DstReg) 1068 MBB.erase(MI); 1072 Register SrcReg = MI.getOperand(1).getReg(); 1073 Register DstReg = MI.getOperand(0).getReg(); 1075 copyPhysReg(MBB, MI, DL, DstReg, SrcSubLo, MI.getOperand(1).isKill()); 1075 copyPhysReg(MBB, MI, DL, DstReg, SrcSubLo, MI.getOperand(1).isKill()); 1076 MBB.erase(MI); 1081 Register SrcReg = MI.getOperand(1).getReg(); 1082 Register DstReg = MI.getOperand(0).getReg(); 1084 copyPhysReg(MBB, MI, DL, DstReg, SrcSubHi, MI.getOperand(1).isKill()); 1084 copyPhysReg(MBB, MI, DL, DstReg, SrcSubHi, MI.getOperand(1).isKill()); 1085 MBB.erase(MI); 1092 Register SrcReg = MI.getOperand(2).getReg(); 1098 MachineInstr *MI1New = BuildMI(MBB, MI, DL, get(NewOpc)) 1099 .add(MI.getOperand(0)) 1100 .addImm(MI.getOperand(1).getImm()) 1102 .cloneMemRefs(MI); 1104 BuildMI(MBB, MI, DL, get(NewOpc)) 1105 .add(MI.getOperand(0)) 1107 .addImm(MI.getOperand(1).getImm() + Offset) 1109 .cloneMemRefs(MI); 1110 MBB.erase(MI); 1116 Register DstReg = MI.getOperand(0).getReg(); 1120 MachineInstr *MI1New = BuildMI(MBB, MI, DL, get(NewOpc), 1122 .add(MI.getOperand(1)) 1123 .addImm(MI.getOperand(2).getImm()) 1124 .cloneMemRefs(MI); 1126 BuildMI(MBB, MI, DL, get(NewOpc), HRI.getSubReg(DstReg, Hexagon::vsub_hi)) 1127 .add(MI.getOperand(1)) 1129 .addImm(MI.getOperand(2).getImm() + Offset) 1130 .cloneMemRefs(MI); 1131 MBB.erase(MI); 1135 Register Reg = MI.getOperand(0).getReg(); 1136 BuildMI(MBB, MI, DL, get(Hexagon::C2_orn), Reg) 1139 MBB.erase(MI); 1143 Register Reg = MI.getOperand(0).getReg(); 1144 BuildMI(MBB, MI, DL, get(Hexagon::C2_andn), Reg) 1147 MBB.erase(MI); 1151 BuildMI(MBB, MI, DL, get(Hexagon::V6_veqw), MI.getOperand(0).getReg()) 1151 BuildMI(MBB, MI, DL, get(Hexagon::V6_veqw), MI.getOperand(0).getReg()) 1154 MBB.erase(MI); 1158 BuildMI(MBB, MI, DL, get(Hexagon::V6_vgtw), MI.getOperand(0).getReg()) 1158 BuildMI(MBB, MI, DL, get(Hexagon::V6_vgtw), MI.getOperand(0).getReg()) 1161 MBB.erase(MI); 1165 Register Vd = MI.getOperand(0).getReg(); 1166 BuildMI(MBB, MI, DL, get(Hexagon::V6_vsubw_dv), Vd) 1169 MBB.erase(MI); 1174 Register DstReg = MI.getOperand(0).getReg(); 1175 Register Src1Reg = MI.getOperand(1).getReg(); 1176 Register Src2Reg = MI.getOperand(2).getReg(); 1181 BuildMI(MBB, MI, MI.getDebugLoc(), get(Hexagon::M2_mpyi), 1181 BuildMI(MBB, MI, MI.getDebugLoc(), get(Hexagon::M2_mpyi), 1185 BuildMI(MBB, MI, MI.getDebugLoc(), get(Hexagon::M2_mpyi), 1185 BuildMI(MBB, MI, MI.getDebugLoc(), get(Hexagon::M2_mpyi), 1189 MBB.erase(MI); 1198 Register DstReg = MI.getOperand(0).getReg(); 1199 Register Src1Reg = MI.getOperand(1).getReg(); 1200 Register Src2Reg = MI.getOperand(2).getReg(); 1201 Register Src3Reg = MI.getOperand(3).getReg(); 1208 BuildMI(MBB, MI, MI.getDebugLoc(), get(Hexagon::M2_maci), 1208 BuildMI(MBB, MI, MI.getDebugLoc(), get(Hexagon::M2_maci), 1213 BuildMI(MBB, MI, MI.getDebugLoc(), get(Hexagon::M2_maci), 1213 BuildMI(MBB, MI, MI.getDebugLoc(), get(Hexagon::M2_maci), 1218 MBB.erase(MI); 1228 const MachineOperand &Op0 = MI.getOperand(0); 1229 const MachineOperand &Op1 = MI.getOperand(1); 1230 const MachineOperand &Op2 = MI.getOperand(2); 1231 const MachineOperand &Op3 = MI.getOperand(3); 1236 DebugLoc DL = MI.getDebugLoc(); 1241 BuildMI(MBB, MI, DL, get(Hexagon::A2_tfrpt), Rd) 1245 BuildMI(MBB, MI, DL, get(Hexagon::A2_tfrpf), Rd) 1248 MBB.erase(MI); 1252 const MachineOperand &Op0 = MI.getOperand(0); 1253 const MachineOperand &Op1 = MI.getOperand(1); 1254 const MachineOperand &Op2 = MI.getOperand(2); 1255 const MachineOperand &Op3 = MI.getOperand(3); 1257 getLiveRegsAt(LiveAtMI, MI); 1266 auto T = BuildMI(MBB, MI, DL, get(Hexagon::V6_vcmov)) 1275 auto T = BuildMI(MBB, MI, DL, get(Hexagon::V6_vncmov)) 1282 MBB.erase(MI); 1286 MachineOperand &Op0 = MI.getOperand(0); 1287 MachineOperand &Op1 = MI.getOperand(1); 1288 MachineOperand &Op2 = MI.getOperand(2); 1289 MachineOperand &Op3 = MI.getOperand(3); 1291 getLiveRegsAt(LiveAtMI, MI); 1302 auto T = BuildMI(MBB, MI, DL, get(Hexagon::V6_vccombine)) 1314 auto T = BuildMI(MBB, MI, DL, get(Hexagon::V6_vnccombine)) 1322 MBB.erase(MI); 1351 BuildMI(MBB, MI, DL, get(Hexagon::PS_loadrdabs), Hexagon::D13) 1354 MBB.erase(MI); 1359 MI.setDesc(get(Hexagon::J2_jump)); 1363 MI.setDesc(get(Hexagon::J2_jumpr)); 1366 MI.setDesc(get(Hexagon::J2_jumprt)); 1369 MI.setDesc(get(Hexagon::J2_jumprf)); 1372 MI.setDesc(get(Hexagon::J2_jumprtnewpt)); 1375 MI.setDesc(get(Hexagon::J2_jumprfnewpt)); 1378 MI.setDesc(get(Hexagon::J2_jumprtnew)); 1381 MI.setDesc(get(Hexagon::J2_jumprfnew));