reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
183 bool isSub = ARM_AM::getAM2Op(OffImm) == ARM_AM::sub; 217 bool isSub = ARM_AM::getAM3Op(OffImm) == ARM_AM::sub; 583 bool isSub = ARM_AM::getAM3Op(OpcImm) == ARM_AM::sub; 612 return ARM_AM::getAM2Op(OffImm) == ARM_AM::sub; 2582 if (ARM_AM::getAM2Op(MI.getOperand(ImmIdx).getImm()) == ARM_AM::sub) 2589 if (ARM_AM::getAM3Op(MI.getOperand(ImmIdx).getImm()) == ARM_AM::sub) 2600 if (ARM_AM::getAM5Op(MI.getOperand(ImmIdx).getImm()) == ARM_AM::sub) 2608 if (ARM_AM::getAM5Op(MI.getOperand(ImmIdx).getImm()) == ARM_AM::sub) 3347 bool isSub = ARM_AM::getAM2Op(ShOpVal) == ARM_AM::sub; 3363 bool isSub = ARM_AM::getAM2Op(ShOpVal) == ARM_AM::sub; 3375 return (ARM_AM::getAM3Op(MI.getOperand(3).getImm()) == ARM_AM::sub) ? 3 : 2; 3391 bool isSub = ARM_AM::getAM2Op(ShOpVal) == ARM_AM::sub; 3404 bool isSub = ARM_AM::getAM2Op(ShOpVal) == ARM_AM::sub; 3422 return (ARM_AM::getAM3Op(MI.getOperand(4).getImm()) == ARM_AM::sub) ? 3 : 2; 3455 bool isSub = ARM_AM::getAM2Op(ShOpVal) == ARM_AM::sub; 3470 return (ARM_AM::getAM3Op(MI.getOperand(4).getImm()) == ARM_AM::sub) ? 4 3478 return (ARM_AM::getAM3Op(MI.getOperand(4).getImm()) == ARM_AM::sub) ? 4 3496 return (ARM_AM::getAM3Op(MI.getOperand(5).getImm()) == ARM_AM::sub) ? 5 3510 return (ARM_AM::getAM3Op(MI.getOperand(5).getImm()) == ARM_AM::sub) ? 5 4112 bool isSub = ARM_AM::getAM2Op(ShOpVal) == ARM_AM::sub;lib/Target/ARM/ARMBaseRegisterInfo.cpp
515 if (ARM_AM::getAM5Op(OffOp.getImm()) == ARM_AM::sub) 523 if (ARM_AM::getAM2Op(MI->getOperand(ImmIdx).getImm()) == ARM_AM::sub) 529 if (ARM_AM::getAM3Op(MI->getOperand(ImmIdx).getImm()) == ARM_AM::sub)lib/Target/ARM/ARMISelDAGToDAG.cpp
664 AddSub = ARM_AM::sub; 693 ARM_AM::AddrOpc AddSub = N.getOpcode() == ISD::SUB ? ARM_AM::sub:ARM_AM::add; 768 ? ARM_AM::add : ARM_AM::sub; 804 ? ARM_AM::add : ARM_AM::sub; 807 if (AddSub == ARM_AM::sub) Val *= -1; 824 ? ARM_AM::add : ARM_AM::sub; 849 Opc = CurDAG->getTargetConstant(ARM_AM::getAM3Opc(ARM_AM::sub, 0), SDLoc(N), 881 AddSub = ARM_AM::sub; 903 ? ARM_AM::add : ARM_AM::sub; 951 AddSub = ARM_AM::sub;lib/Target/ARM/ARMISelLowering.cpp
10442 bool isSub = ARM_AM::getAM2Op(Offset) == ARM_AM::sub;
lib/Target/ARM/ARMLoadStoreOptimizer.cpp238 if (Op == ARM_AM::sub) 1420 NewOpc = getPreIndexedLoadStoreOpcode(Opcode, ARM_AM::sub); 1426 NewOpc = getPostIndexedLoadStoreOpcode(Opcode, ARM_AM::sub); 1432 ARM_AM::AddrOpc AddSub = Offset < 0 ? ARM_AM::sub : ARM_AM::add; 2197 AddSub = ARM_AM::sub;lib/Target/ARM/AsmParser/ARMAsmParser.cpp
2811 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; 2819 Val = ARM_AM::getAM2Opc(Memory.isNegative ? ARM_AM::sub : ARM_AM::add, 2832 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; 2855 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; 2863 Val = ARM_AM::getAM3Opc(Memory.isNegative ? ARM_AM::sub : ARM_AM::add, 0); 2874 ARM_AM::getAM3Opc(PostIdxReg.isAdd ? ARM_AM::add : ARM_AM::sub, 0); 2883 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; 2905 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; 2927 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; 3042 ARM_AM::getAM2Opc(Memory.isNegative ? ARM_AM::sub : ARM_AM::add, 3124 ARM_AM::AddrOpc opc = PostIdxReg.isAdd ? ARM_AM::add : ARM_AM::sub;lib/Target/ARM/Disassembler/ARMDisassembler.cpp
1756 imm = ARM_AM::getAM5Opc(U ? ARM_AM::add : ARM_AM::sub, imm); 1867 Op = ARM_AM::sub; 1954 shift = ARM_AM::getAM2Opc(ARM_AM::sub, imm, ShOp); 2570 Inst.addOperand(MCOperand::createImm(ARM_AM::getAM5Opc(ARM_AM::sub, imm))); 2590 Inst.addOperand(MCOperand::createImm(ARM_AM::getAM5FP16Opc(ARM_AM::sub, imm)));lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h
42 inline const char *getAddrOpcStr(AddrOpc Op) { return Op == sub ? "-" : ""; } 402 bool isSub = Opc == sub; 409 return ((AM2Opc >> 12) & 1) ? sub : add; 433 bool isSub = Opc == sub; 438 return ((AM3Opc >> 8) & 1) ? sub : add; 476 bool isSub = Opc == sub; 481 return ((AM5Opc >> 8) & 1) ? sub : add; 497 bool isSub = Opc == sub; 504 return ((AM5Opc >> 8) & 1) ? sub : add;lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp
536 if (AlwaysPrintImm0 || ImmOffs || (op == ARM_AM::sub)) { 665 if (AlwaysPrintImm0 || ImmOffs || Op == ARM_AM::sub) { 689 if (AlwaysPrintImm0 || ImmOffs || Op == ARM_AM::sub) {lib/Target/ARM/Thumb2InstrInfo.cpp
587 if (ARM_AM::getAM5Op(OffOp.getImm()) == ARM_AM::sub) 601 if (ARM_AM::getAM5FP16Op(OffOp.getImm()) == ARM_AM::sub)