reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/ARM/AsmParser/ARMAsmParser.cpp
 6434   if (isThumbTwo()) {
 6528        (isThumbTwo() && Mnemonic == "sub")) &&
 6541   if (isThumbTwo() && (Mnemonic == "add" || Mnemonic == "sub") &&
 6568   if (isThumbTwo() && Mnemonic == "mul" && Operands.size() == 6 &&
 6588   if (isThumbTwo() && Mnemonic == "mul" && Operands.size() == 5 &&
 7133   if (isThumbTwo() && Mnemonic == "sub" && Operands.size() == 6 &&
 7322   } else if (isThumbTwo() && MCID.isPredicable() &&
 7568     if (checkLowRegisterList(Inst, 3, Rn, 0, ListContainsBase) && !isThumbTwo())
 7572     if (!ListContainsBase && !HasWritebackToken && !isThumbTwo())
 7664         !isThumbTwo())
 7674         !isThumbTwo())
 7685     if (InvalidLowList && !isThumbTwo())
 7703     if (!isThumbTwo() &&
 9893       assert(isThumbTwo());
 9912       assert(isThumbTwo());
 9925     assert(isThumbTwo());
 9936     assert(isThumbTwo());
10204     if (isThumbTwo() && Inst.getOperand(OpNo).getReg() != ARM::CPSR &&
10207     if (isThumbTwo() && Inst.getOperand(OpNo).getReg() == ARM::CPSR &&
10326   if (inExplicitITBlock() || !isThumbTwo() || !useImplicitITThumb())