reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Overrides

include/llvm/MC/MCParser/MCParsedAsmOperand.h
   59   virtual bool isReg() const = 0;

References

gen/lib/Target/ARM/ARMGenAsmMatcher.inc
 9074   if (Operand.isReg()) {
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
 3975   if (!PrevOp->isReg())
 6423   if (!Op3.isReg() || !Op4.isReg())
 6423   if (!Op3.isReg() || !Op4.isReg())
 6438                         (Op5.isReg() && Op5.getReg() == ARM::PC);
 6441                       (Op5.isReg() && Op5.getReg() == ARM::SP)) &&
 6466   if (!Transform && Op5.isReg() && Op3Reg == Op5.getReg() &&
 6481         LastOp->isReg())
 6519       static_cast<ARMOperand &>(*Operands[3]).isReg() &&
 6520       static_cast<ARMOperand &>(*Operands[4]).isReg() &&
 6529       Operands.size() == 6 && static_cast<ARMOperand &>(*Operands[3]).isReg() &&
 6530       static_cast<ARMOperand &>(*Operands[4]).isReg() &&
 6533       ((Mnemonic == "add" && static_cast<ARMOperand &>(*Operands[5]).isReg()) ||
 6542       Operands.size() == 6 && static_cast<ARMOperand &>(*Operands[3]).isReg() &&
 6543       static_cast<ARMOperand &>(*Operands[4]).isReg() &&
 6570       static_cast<ARMOperand &>(*Operands[3]).isReg() &&
 6571       static_cast<ARMOperand &>(*Operands[4]).isReg() &&
 6572       static_cast<ARMOperand &>(*Operands[5]).isReg() &&
 6590       static_cast<ARMOperand &>(*Operands[3]).isReg() &&
 6591       static_cast<ARMOperand &>(*Operands[4]).isReg() &&
 6607       static_cast<ARMOperand &>(*Operands[3]).isReg() &&
 6631     if (static_cast<ARMOperand &>(*Operands[RegIdx]).isReg() &&
 6720   if (!Op2.isReg())
 7104       if (Op1.isReg() && Op2.isReg() && MRC.contains(Op1.getReg()) &&
 7104       if (Op1.isReg() && Op2.isReg() && MRC.contains(Op1.getReg()) &&
 7134       static_cast<ARMOperand &>(*Operands[3]).isReg() &&
 7136       static_cast<ARMOperand &>(*Operands[4]).isReg() &&
11841     if (hasV8Ops() && Op.isReg() && Op.getReg() == ARM::SP)
11845     if (Op.isReg() &&