reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
263 bool inExplicitITBlock() { return inITBlock() && ITState.IsExplicit; } 264 bool inImplicitITBlock() { return inITBlock() && !ITState.IsExplicit; } 271 if (!inITBlock()) return; 323 return inITBlock() && (ITState.Mask & 1); 346 assert(!inITBlock()); 358 assert(!inITBlock()); 5581 if(inITBlock()) { 6549 if (inITBlock() && 6580 !inITBlock() || (static_cast<ARMOperand &>(*Operands[3]).getReg() != 6597 !inITBlock())) 7304 if (inITBlock() && !instIsBreakpoint(Inst)) { 9501 Inst.getOperand(5).getReg() == (inITBlock() ? 0 : ARM::CPSR) && 9535 inITBlock() == (Inst.getOpcode() == ARM::t2MOVsr) && 9570 inITBlock() == (Inst.getOpcode() == ARM::t2MOVsi) && 9585 if (inITBlock()) { 9800 Inst.getOperand(5).getReg() != (inITBlock() ? 0 : ARM::CPSR) || 9853 if (Inst.getOperand(1).getImm() != ARMCC::AL && !inITBlock()) { 9860 if (Inst.getOperand(1).getImm() != ARMCC::AL && !inITBlock()){ 9867 if (Inst.getOperand(1).getImm() == ARMCC::AL || inITBlock()) { 9949 Inst.getOperand(4).getReg() == (inITBlock() ? 0 : ARM::CPSR) && 10072 assert(!inITBlock() && "nested IT blocks?!"); 10087 Inst.getOperand(5).getReg() == (inITBlock() ? 0 : ARM::CPSR) && 10123 Inst.getOperand(5).getReg() == (inITBlock() ? 0 : ARM::CPSR) && 10205 !inITBlock()) 10208 inITBlock()) 10211 if (Opc == ARM::tLSLri && Inst.getOperand(3).getImm() == 0 && inITBlock()) 10438 bool wasInITBlock = inITBlock();