reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
53861 case 0: return (Subtarget->hasV6Ops()) && (!Subtarget->isThumb()); 53873 case 12: return (Subtarget->hasV6Ops()) && (!Subtarget->isThumb()) && (Subtarget->useMulOps()); 53874 case 13: return (!Subtarget->isThumb()) && (!Subtarget->hasV6Ops()); 53877 case 16: return (Subtarget->hasV6Ops()) && (Subtarget->isThumb()) && (Subtarget->isThumb1Only()); 53922 case 61: return (!Subtarget->isThumb()) && (!Subtarget->hasV6Ops()) && (Subtarget->useMulOps());gen/lib/Target/ARM/ARMGenFastISel.inc
1591 if ((Subtarget->hasV6Ops()) && (Subtarget->isThumb()) && (Subtarget->isThumb1Only())) { 1594 if ((Subtarget->hasV6Ops()) && (!Subtarget->isThumb())) { 2882 if ((Subtarget->hasV6Ops()) && (!Subtarget->isThumb())) { 2903 if ((Subtarget->hasV6Ops()) && (!Subtarget->isThumb())) { 2924 if ((Subtarget->hasV6Ops()) && (!Subtarget->isThumb())) { 2945 if ((Subtarget->hasV6Ops()) && (!Subtarget->isThumb())) { 4153 if ((!Subtarget->isThumb()) && (!Subtarget->hasV6Ops()) && (Subtarget->useMulOps())) { 4156 if ((Subtarget->hasV6Ops()) && (!Subtarget->isThumb())) { 4246 if ((Subtarget->hasV6Ops()) && (!Subtarget->isThumb())) {gen/lib/Target/ARM/ARMGenGlobalISel.inc
123 if (Subtarget->hasV6Ops()) 125 if (!Subtarget->hasV6Ops())lib/Target/ARM/ARMBaseInstrInfo.cpp
4737 if (MI.getOpcode() == ARM::tMOVr && !Subtarget.hasV6Ops()) {
lib/Target/ARM/ARMFastISel.cpp 2681 bool hasV6Ops = Subtarget->hasV6Ops();
lib/Target/ARM/ARMISelDAGToDAG.cpp3217 Subtarget->hasV6Ops() ? ARM::UMLAL : ARM::UMLALv5, dl, 3236 Subtarget->hasV6Ops() ? ARM::SMLAL : ARM::SMLALv5, dl, 3242 if (!Subtarget->hasV6Ops() || !Subtarget->hasDSP())lib/Target/ARM/ARMISelLowering.cpp
1042 if (Subtarget->isThumb1Only() || !Subtarget->hasV6Ops() 1090 if (!Subtarget->hasV6Ops()) 1250 if (!Subtarget->hasV6Ops()) { 1422 if (Subtarget->hasV6Ops()) 1717 PrefAlign = (Subtarget->hasV6Ops() && !Subtarget->isMClass() ? 8 : 4); 3766 assert(Subtarget->hasV6Ops() && !Subtarget->isThumb() && 4887 if (((!Subtarget->isThumb() && Subtarget->hasV6Ops()) || Subtarget->isThumb2()) && 11349 if (Subtarget->hasV6Ops() && Subtarget->hasDSP() && Subtarget->useMulOps() && 11396 if (!Subtarget->hasV6Ops() || !Subtarget->hasDSP()) 11444 if (!Subtarget->hasV6Ops() || !Subtarget->hasDSP()) 12061 if (!Subtarget->hasV6Ops() || 13746 if (N->getOpcode() == ISD::SRL && VT == MVT::i32 && ST->hasV6Ops()) { 15561 if (!Subtarget->hasV6Ops()) 16410 if (Subtarget->hasV6Ops() && !Subtarget->isThumb()) {lib/Target/ARM/ARMLoadStoreOptimizer.cpp
732 !STI->hasV6Ops()) { 2181 unsigned ReqAlign = STI->hasV6Ops()lib/Target/ARM/ARMSubtarget.cpp
142 return hasV6Ops() && hasARMOps() && !isTargetWindows(); 414 if (!hasV6Ops())lib/Target/ARM/ARMSubtarget.h
633 return HasDataBarrier || (hasV6Ops() && !isThumb());
lib/Target/ARM/Thumb1InstrInfo.cpp 49 if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg)