reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
643 if (isThumb1 && ContainsReg(Regs, Base)) { 644 assert(Base != ARM::SP && "Thumb1 does not allow SP in register list"); 701 (isThumb1 && Base == ARM::SP) ? ARM::tADDrSPi : 709 (isThumb1 && Offset < 8 && Base != ARM::SP) ? ARM::tSUBi3 : 720 (!isi32Store(Opcode) || !ContainsReg(Regs, Base)); 728 if (Base != NewBase && 731 if (isARMLowRegister(NewBase) && isARMLowRegister(Base) && 737 .addReg(Base, getKillRegState(KillOldBase)); 740 .addReg(Base, getKillRegState(KillOldBase)) 744 Base = NewBase; 750 .addReg(Base, getKillRegState(KillOldBase)) 756 .addReg(Base, getKillRegState(KillOldBase)) 761 .addReg(Base, getKillRegState(KillOldBase)) 766 Base = NewBase; 794 assert(!(ContainsReg(Regs, Base)) && "Thumb1 can't LDM ! with Base in Regs"); 802 MIB.addReg(Base, getDefRegState(true)) 803 .addReg(Base, getKillRegState(BaseKill)); 808 UpdateBaseRegUses(MBB, InsertBefore, DL, Base, NumRegs, Pred, PredReg); 812 MIB.addReg(Base, getKillRegState(BaseKill));