|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
lib/Target/ARM/ARMExpandPseudoInsts.cpp 480 TII->get(TableEntry->RealOpc));
591 TII->get(TableEntry->RealOpc));
668 TII->get(TableEntry->RealOpc));
752 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc));
846 LO16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVi), DstReg);
847 HI16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::ORRri))
878 LO16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(LO16Opc), DstReg);
879 HI16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(HI16Opc))
955 BuildMI(MBB, MBBI, DL, TII->get(UxtOp), DesiredReg)
968 MIB = BuildMI(LoadCmpBB, DL, TII->get(LdrexOp), Dest.getReg());
975 BuildMI(LoadCmpBB, DL, TII->get(CMPrr))
980 BuildMI(LoadCmpBB, DL, TII->get(Bcc))
991 MIB = BuildMI(StoreBB, DL, TII->get(StrexOp), TempReg)
999 BuildMI(StoreBB, DL, TII->get(CMPri))
1003 BuildMI(StoreBB, DL, TII->get(Bcc))
1085 MIB = BuildMI(LoadCmpBB, DL, TII->get(LDREXD));
1090 BuildMI(LoadCmpBB, DL, TII->get(CMPrr))
1095 BuildMI(LoadCmpBB, DL, TII->get(CMPrr))
1101 BuildMI(LoadCmpBB, DL, TII->get(Bcc))
1113 MIB = BuildMI(StoreBB, DL, TII->get(STREXD), TempReg);
1119 BuildMI(StoreBB, DL, TII->get(CMPri))
1123 BuildMI(StoreBB, DL, TII->get(Bcc))
1219 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(newOpc),
1232 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc),
1244 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsi),
1257 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsr),
1273 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc),
1285 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc),
1299 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc),
1322 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc),
1336 static_cast<const ARMBaseInstrInfo*>(TII);
1349 FramePtr, -NumBytes, ARMCC::AL, 0, *TII);
1352 FramePtr, -NumBytes, *TII, RI);
1356 *TII);
1369 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(bicOpc), ARM::R6)
1384 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsi),
1397 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsi),
1421 TII->get(Thumb ? ARM::tLDRpci : ARM::LDRi12), Reg)
1428 TII->get(Thumb ? ARM::tBLXr : ARM::BLX));
1434 TII->get(Thumb ? ARM::tBL : ARM::BL));
1453 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewLdOpc), DstReg)
1458 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::tPICADD))
1505 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(LDRLITOpc), DstReg)
1513 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(PICAddOpc))
1544 TII->get(LO16Opc), DstReg)
1548 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(HI16Opc), DstReg)
1554 TII->get(PICAddOpc))
1576 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::SUBri), ARM::PC)
1589 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc));
1620 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc));
1932 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::tPUSH))
1937 MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::tBL));
1940 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::STMDB_UPD))
1947 MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::BL));
1972 TII = STI->getInstrInfo();