reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
753 MachineBasicBlock &MBB = *MI.getParent(); 761 int FrameIndex = MI.getOperand(FIOperandNum).getIndex(); 781 assert(!MI.isDebugValue() && "DBG_VALUEs should be handled in target-independent code"); 786 Done = rewriteARMFrameIndex(MI, FIOperandNum, FrameReg, Offset, TII); 789 Done = rewriteT2FrameIndex(MI, FIOperandNum, FrameReg, Offset, TII, this); 799 (MI.getDesc().TSFlags & ARMII::AddrModeMask) == ARMII::AddrMode4 || 800 (MI.getDesc().TSFlags & ARMII::AddrModeMask) == ARMII::AddrMode6 || 801 (MI.getDesc().TSFlags & ARMII::AddrModeMask) == ARMII::AddrModeT2_i7 || 802 (MI.getDesc().TSFlags & ARMII::AddrModeMask) == ARMII::AddrModeT2_i7s2 || 803 (MI.getDesc().TSFlags & ARMII::AddrModeMask) == 808 int PIdx = MI.findFirstPredOperandIdx(); 810 ? ARMCC::AL : (ARMCC::CondCodes)MI.getOperand(PIdx).getImm(); 811 Register PredReg = (PIdx == -1) ? Register() : MI.getOperand(PIdx+1).getReg(); 813 const MCInstrDesc &MCID = MI.getDesc(); 815 TII.getRegClass(MCID, FIOperandNum, this, *MI.getParent()->getParent()); 820 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false, false, false); 824 emitARMRegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, 828 emitT2RegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, 832 MI.getOperand(FIOperandNum).ChangeToRegister(ScratchReg, false, false,true);