reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/ARM/ARMAsmPrinter.cpp
  271       return AsmPrinter::PrintAsmOperand(MI, OpNum, ExtraCode, O);
  274       printOperand(MI, OpNum, O);
  277       if (MI->getOperand(OpNum).isReg()) {
  278         Register Reg = MI->getOperand(OpNum).getReg();
  292       if (!MI->getOperand(OpNum).isImm())
  294       O << ~(MI->getOperand(OpNum).getImm());
  297       if (!MI->getOperand(OpNum).isImm())
  299       O << (MI->getOperand(OpNum).getImm() & 0xffff);
  302       if (!MI->getOperand(OpNum).isReg())
  304       const MachineOperand &MO = MI->getOperand(OpNum);
  322       unsigned RegOps = OpNum + 1;
  335       if (OpNum == 0)
  337       const MachineOperand &FlagsOP = MI->getOperand(OpNum - 1);
  347         for (OpNum = InlineAsm::MIOp_FirstOperand; TiedIdx; --TiedIdx) {
  348           unsigned OpFlags = MI->getOperand(OpNum).getImm();
  349           OpNum += InlineAsm::getNumOperandRegisters(OpFlags) + 1;
  351         Flags = MI->getOperand(OpNum).getImm();
  355         OpNum += 1;
  377         const MachineOperand &MO = MI->getOperand(OpNum);
  388       unsigned RegOp = FirstHalf ? OpNum : OpNum + 1;
  388       unsigned RegOp = FirstHalf ? OpNum : OpNum + 1;
  401       if (!MI->getOperand(OpNum).isReg())
  403       Register Reg = MI->getOperand(OpNum).getReg();
  417       const MachineOperand &MO = MI->getOperand(OpNum);
  432   printOperand(MI, OpNum, O);