reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
332 if (TII->isWQM(Opcode)) { 373 } else if (TII->isDisableWQM(MI)) { 435 (MI.isTerminator() || (TII->usesVM_CNT(MI) && MI.mayStore()))) { 536 if (TII->isScalarUnit(MI)) 562 BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::COPY), SaveReg) 565 BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::COPY), AMDGPU::SCC) 632 MI = BuildMI(MBB, Before, DebugLoc(), TII->get(ST->isWave32() ? 638 MI = BuildMI(MBB, Before, DebugLoc(), TII->get(ST->isWave32() ? 655 MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::COPY), Exec) 658 MI = BuildMI(MBB, Before, DebugLoc(), TII->get(ST->isWave32() ? 673 MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::ENTER_WWM), SaveOrig) 684 MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::EXIT_WWM), 845 BuildMI(*MI->getParent(), MI, DL, TII->get(AMDGPU::COPY), Dest) 865 const unsigned MovOp = TII->getMovOpcode(regClass); 866 MI->setDesc(TII->get(MovOp)); 871 MI->setDesc(TII->get(AMDGPU::COPY)); 885 TII = ST->getInstrInfo(); 886 TRI = &TII->getRegisterInfo(); 905 TII->get(AMDGPU::COPY), LiveMaskReg) 914 BuildMI(Entry, EntryMI, DebugLoc(), TII->get(ST->isWave32() ?