reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp

  104     return RC->hasSuperClassEq(TRI.getBoolRC()) &&
  133       if (!RBI.constrainGenericRegister(DstReg, *TRI.getBoolRC(), *MRI))
  271     const TargetRegisterClass *RC = TRI.getBoolRC();
  751                                *TRI.getBoolRC(), *MRI);
 1584     ConstrainRC = TRI.getBoolRC();

lib/Target/AMDGPU/AMDGPUSubtarget.h

 1176     return getRegisterInfo()->getBoolRC();

lib/Target/AMDGPU/SIISelLowering.cpp

 3183   const TargetRegisterClass *BoolRC = TRI->getBoolRC();
 3603     const TargetRegisterClass *BoolRC = TRI->getBoolRC();

lib/Target/AMDGPU/SIInstrInfo.cpp

  897       Register SReg2 = MRI.createVirtualRegister(RI.getBoolRC());
  915       Register SReg2 = MRI.createVirtualRegister(RI.getBoolRC());
  945   Register Reg = MRI.createVirtualRegister(RI.getBoolRC());
  958   Register Reg = MRI.createVirtualRegister(RI.getBoolRC());
 6075     Register DstReg = MRI.createVirtualRegister(RI.getBoolRC());
 6102     Register DstReg = MRI.createVirtualRegister(RI.getBoolRC());
 6103     Register BackEdgeReg = MRI.createVirtualRegister(RI.getBoolRC());
 6113         Register ZeroReg = MRI.createVirtualRegister(RI.getBoolRC());
 6197   Register UnusedCarry = MRI.createVirtualRegister(RI.getBoolRC());
 6212   Register UnusedCarry = RS.scavengeRegister(RI.getBoolRC(), I, 0, false);

lib/Target/AMDGPU/SILowerControlFlow.cpp

  502   BoolRC = TRI->getBoolRC();

lib/Target/AMDGPU/SIRegisterInfo.cpp

 1852     return getBoolRC();

lib/Target/AMDGPU/SIWholeQuadMode.cpp

  711   const TargetRegisterClass *BoolRC = TRI->getBoolRC();
  903       LiveMaskReg = MRI->createVirtualRegister(TRI->getBoolRC());