reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
  509   Paired = MI;
  510   assert(InstClass == getInstClass(Paired->getOpcode(), TII));
  513     DMask1 = TII.getNamedOperand(*Paired, AMDGPU::OpName::dmask)->getImm();
  517     Offset1 = Paired->getOperand(OffsetIdx).getImm();
  520   Width1 = getOpcodeWidth(*Paired, TII);
  524     GLC1 = TII.getNamedOperand(*Paired, AMDGPU::OpName::glc)->getImm();
  526       SLC1 = TII.getNamedOperand(*Paired, AMDGPU::OpName::slc)->getImm();
  528     DLC1 = TII.getNamedOperand(*Paired, AMDGPU::OpName::dlc)->getImm();
  655     if (AMDGPU::getNamedOperandIdx(CI.Paired->getOpcode(), op) != Idx)
  658         CI.I->getOperand(Idx).getImm() != CI.Paired->getOperand(Idx).getImm())
  880   const auto *Dest1 = TII->getNamedOperand(*CI.Paired, AMDGPU::OpName::vdst);
  912     BuildMI(*MBB, CI.Paired, DL, TII->get(AMDGPU::S_MOV_B32), ImmReg)
  918     TII->getAddNoCarry(*MBB, CI.Paired, DL, BaseReg)
  926       BuildMI(*MBB, CI.Paired, DL, Read2Desc, DestReg)
  931           .cloneMergedMemRefs({&*CI.I, &*CI.Paired});
  938   BuildMI(*MBB, CI.Paired, DL, CopyDesc)
  941   MachineInstr *Copy1 = BuildMI(*MBB, CI.Paired, DL, CopyDesc)
  948   CI.Paired->eraseFromParent();
  981       TII->getNamedOperand(*CI.Paired, AMDGPU::OpName::data0);
 1005     BuildMI(*MBB, CI.Paired, DL, TII->get(AMDGPU::S_MOV_B32), ImmReg)
 1011     TII->getAddNoCarry(*MBB, CI.Paired, DL, BaseReg)
 1019       BuildMI(*MBB, CI.Paired, DL, Write2Desc)
 1026           .cloneMergedMemRefs({&*CI.I, &*CI.Paired});
 1031   CI.Paired->eraseFromParent();
 1050   auto MIB = BuildMI(*MBB, CI.Paired, DL, TII->get(Opcode), DestReg);
 1061   assert(CI.I->hasOneMemOperand() && CI.Paired->hasOneMemOperand());
 1064   const MachineMemOperand *MMOb = *CI.Paired->memoperands_begin();
 1075   const auto *Dest1 = TII->getNamedOperand(*CI.Paired, AMDGPU::OpName::vdata);
 1077   BuildMI(*MBB, CI.Paired, DL, CopyDesc)
 1080   MachineInstr *Copy1 = BuildMI(*MBB, CI.Paired, DL, CopyDesc)
 1087   CI.Paired->eraseFromParent();
 1105   assert(CI.I->hasOneMemOperand() && CI.Paired->hasOneMemOperand());
 1108   const MachineMemOperand *MMOb = *CI.Paired->memoperands_begin();
 1111     BuildMI(*MBB, CI.Paired, DL, TII->get(Opcode), DestReg)
 1125   const auto *Dest1 = TII->getNamedOperand(*CI.Paired, AMDGPU::OpName::sdst);
 1127   BuildMI(*MBB, CI.Paired, DL, CopyDesc)
 1130   MachineInstr *Copy1 = BuildMI(*MBB, CI.Paired, DL, CopyDesc)
 1137   CI.Paired->eraseFromParent();
 1154   auto MIB = BuildMI(*MBB, CI.Paired, DL, TII->get(Opcode), DestReg);
 1164   assert(CI.I->hasOneMemOperand() && CI.Paired->hasOneMemOperand());
 1167   const MachineMemOperand *MMOb = *CI.Paired->memoperands_begin();
 1187   const auto *Dest1 = TII->getNamedOperand(*CI.Paired, AMDGPU::OpName::vdata);
 1189   BuildMI(*MBB, CI.Paired, DL, CopyDesc)
 1192   MachineInstr *Copy1 = BuildMI(*MBB, CI.Paired, DL, CopyDesc)
 1199   CI.Paired->eraseFromParent();
 1311   const auto *Src1 = TII->getNamedOperand(*CI.Paired, AMDGPU::OpName::vdata);
 1313   BuildMI(*MBB, CI.Paired, DL, TII->get(AMDGPU::REG_SEQUENCE), SrcReg)
 1319   auto MIB = BuildMI(*MBB, CI.Paired, DL, TII->get(Opcode))
 1331   assert(CI.I->hasOneMemOperand() && CI.Paired->hasOneMemOperand());
 1334   const MachineMemOperand *MMOb = *CI.Paired->memoperands_begin();
 1350   CI.Paired->eraseFromParent();
 1770         removeCombinedInst(MergeList, *CI.Paired);
 1778         removeCombinedInst(MergeList, *CI.Paired);
 1786         removeCombinedInst(MergeList, *CI.Paired);
 1795         removeCombinedInst(MergeList, *CI.Paired);
 1804         removeCombinedInst(MergeList, *CI.Paired);
 1813         removeCombinedInst(MergeList, *CI.Paired);