reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
1143 MachineBasicBlock *MBB = CI.I->getParent(); 1144 DebugLoc DL = CI.I->getDebugLoc(); 1146 const unsigned Opcode = getNewOpcode(CI); 1148 const TargetRegisterClass *SuperRC = getTargetRegisterClass(CI); 1152 unsigned MergedOffset = std::min(CI.Offset0, CI.Offset1); 1152 unsigned MergedOffset = std::min(CI.Offset0, CI.Offset1); 1154 auto MIB = BuildMI(*MBB, CI.Paired, DL, TII->get(Opcode), DestReg); 1159 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::vaddr)); 1164 assert(CI.I->hasOneMemOperand() && CI.Paired->hasOneMemOperand()); 1164 assert(CI.I->hasOneMemOperand() && CI.Paired->hasOneMemOperand()); 1166 const MachineMemOperand *MMOa = *CI.I->memoperands_begin(); 1167 const MachineMemOperand *MMOb = *CI.Paired->memoperands_begin(); 1170 MIB.add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::srsrc)) 1171 .add(*TII->getNamedOperand(*CI.I, AMDGPU::OpName::soffset)) 1173 .addImm(CI.GLC0) // glc 1174 .addImm(CI.SLC0) // slc 1176 .addImm(CI.DLC0) // dlc 1180 std::pair<unsigned, unsigned> SubRegIdx = getSubRegIdxs(CI); 1186 const auto *Dest0 = TII->getNamedOperand(*CI.I, AMDGPU::OpName::vdata); 1187 const auto *Dest1 = TII->getNamedOperand(*CI.Paired, AMDGPU::OpName::vdata); 1189 BuildMI(*MBB, CI.Paired, DL, CopyDesc) 1192 MachineInstr *Copy1 = BuildMI(*MBB, CI.Paired, DL, CopyDesc) 1196 moveInstsAfter(Copy1, CI.InstsToMove); 1198 CI.I->eraseFromParent(); 1199 CI.Paired->eraseFromParent();