reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp

  858           = TII->getNamedOperand(MI, AMDGPU::OpName::callee);

lib/Target/AMDGPU/AMDGPUMacroFusion.cpp

   47     const MachineOperand *Src2 = TII.getNamedOperand(SecondMI,

lib/Target/AMDGPU/GCNHazardRecognizer.cpp

  126   const MachineOperand *RegOp = TII->getNamedOperand(RegInstr,
  690         TII->getNamedOperand(MI, AMDGPU::OpName::soffset);

lib/Target/AMDGPU/SIFixSGPRCopies.cpp

  334       TII->getNamedOperand(*MoveImm, AMDGPU::OpName::src0);

lib/Target/AMDGPU/SIFoldOperands.cpp

 1247     if (!TII->getNamedOperand(MI, AMDGPU::OpName::clamp)->getImm())
 1251     const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
 1252     const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
 1264       = TII->getNamedOperand(MI, AMDGPU::OpName::src0_modifiers)->getImm();
 1266       = TII->getNamedOperand(MI, AMDGPU::OpName::src1_modifiers)->getImm();
 1367     const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
 1368     const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
 1396     const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
 1397     const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);

lib/Target/AMDGPU/SIInstrInfo.cpp

  267         getNamedOperand(LdSt, AMDGPU::OpName::offset);
  270       BaseOp = getNamedOperand(LdSt, AMDGPU::OpName::addr);
  286         getNamedOperand(LdSt, AMDGPU::OpName::offset0);
  288         getNamedOperand(LdSt, AMDGPU::OpName::offset1);
  309       BaseOp = getNamedOperand(LdSt, AMDGPU::OpName::addr);
  320     const MachineOperand *SOffset = getNamedOperand(LdSt, AMDGPU::OpName::soffset);
  324       const MachineOperand *AddrReg = getNamedOperand(LdSt, AMDGPU::OpName::vaddr);
  328       const MachineOperand *RSrc = getNamedOperand(LdSt, AMDGPU::OpName::srsrc);
  335         getNamedOperand(LdSt, AMDGPU::OpName::offset);
  341     const MachineOperand *AddrReg = getNamedOperand(LdSt, AMDGPU::OpName::vaddr);
  346         getNamedOperand(LdSt, AMDGPU::OpName::offset);
  360         getNamedOperand(LdSt, AMDGPU::OpName::offset);
  364     const MachineOperand *SBaseReg = getNamedOperand(LdSt, AMDGPU::OpName::sbase);
  373     const MachineOperand *VAddr = getNamedOperand(LdSt, AMDGPU::OpName::vaddr);
  376       if (getNamedOperand(LdSt, AMDGPU::OpName::saddr))
  382       BaseOp = getNamedOperand(LdSt, AMDGPU::OpName::saddr);
  385     Offset = getNamedOperand(LdSt, AMDGPU::OpName::offset)->getImm();
  448     FirstDst = getNamedOperand(FirstLdSt, AMDGPU::OpName::vdata);
  450       FirstDst = getNamedOperand(FirstLdSt, AMDGPU::OpName::vdst);
  451     SecondDst = getNamedOperand(SecondLdSt, AMDGPU::OpName::vdata);
  453       SecondDst = getNamedOperand(SecondLdSt, AMDGPU::OpName::vdst);
  455     FirstDst = getNamedOperand(FirstLdSt, AMDGPU::OpName::sdst);
  456     SecondDst = getNamedOperand(SecondLdSt, AMDGPU::OpName::sdst);
  458     FirstDst = getNamedOperand(FirstLdSt, AMDGPU::OpName::vdst);
  459     SecondDst = getNamedOperand(SecondLdSt, AMDGPU::OpName::vdst);
 2975   const MachineOperand *Mods = getNamedOperand(MI, OpName);
 2989   const MachineOperand *Src2 = getNamedOperand(MI, AMDGPU::OpName::src2);
 3005           = getNamedOperand(MI, AMDGPU::OpName::src1);
 3025   const MachineOperand *Src1 = getNamedOperand(MI, AMDGPU::OpName::src1);
 3333       const MachineOperand *OMod = getNamedOperand(MI, AMDGPU::OpName::omod);
 3352         const MachineOperand *Clamp = getNamedOperand(MI, AMDGPU::OpName::clamp);
 3359         const MachineOperand *OMod = getNamedOperand(MI, AMDGPU::OpName::omod);
 3367     const MachineOperand *DstUnused = getNamedOperand(MI, AMDGPU::OpName::dst_unused);
 3394     const MachineOperand *DMask = getNamedOperand(MI, AMDGPU::OpName::dmask);
 3399       const MachineOperand *TFE = getNamedOperand(MI, AMDGPU::OpName::tfe);
 3400       const MachineOperand *LWE = getNamedOperand(MI, AMDGPU::OpName::lwe);
 3401       const MachineOperand *D16 = getNamedOperand(MI, AMDGPU::OpName::d16);
 3547     auto Op = getNamedOperand(MI, AMDGPU::OpName::simm16);
 3588     const MachineOperand *Dst = getNamedOperand(MI, AMDGPU::OpName::vdst);
 3626       const MachineOperand *Soff = getNamedOperand(MI, AMDGPU::OpName::soff);
 3635     const MachineOperand *Offset = getNamedOperand(MI, AMDGPU::OpName::offset);
 3643     const MachineOperand *DimOp = getNamedOperand(MI, AMDGPU::OpName::dim);
 3689   const MachineOperand *DppCt = getNamedOperand(MI, AMDGPU::OpName::dpp_ctrl);
 5921   const MachineOperand *Addr = getNamedOperand(MI, AMDGPU::OpName::vaddr);
 5929   return getNamedOperand(MI, AMDGPU::OpName::vdata)->getReg();
 5934   const MachineOperand *Addr = getNamedOperand(MI, AMDGPU::OpName::addr);
 5937   return getNamedOperand(MI, AMDGPU::OpName::data)->getReg();

lib/Target/AMDGPU/SILoadStoreOptimizer.cpp

  284         TII.getNamedOperand(MI, AMDGPU::OpName::dmask)->getImm();

lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp

  111   auto Op = TII.getNamedOperand(MI, AMDGPU::OpName::src1);
  114   Op = TII.getNamedOperand(MI, AMDGPU::OpName::src0);

lib/Target/AMDGPU/SIPeepholeSDWA.cpp

  338   if (TII->getNamedOperand(*MI, AMDGPU::OpName::src0) == SrcOp) {
  339     if (auto *Mod = TII->getNamedOperand(*MI, AMDGPU::OpName::src0_modifiers)) {
  342   } else if (TII->getNamedOperand(*MI, AMDGPU::OpName::src1) == SrcOp) {
  343     if (auto *Mod = TII->getNamedOperand(*MI, AMDGPU::OpName::src1_modifiers)) {