reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
4042 if (Src1.isReg() && RI.isVGPR(MRI, Src1.getReg())) { 4042 if (Src1.isReg() && RI.isVGPR(MRI, Src1.getReg())) { 4046 .add(Src1); 4047 Src1.ChangeToRegister(Reg, false); 4056 if (Src1.isReg() && RI.isAGPR(MRI, Src1.getReg())) 4056 if (Src1.isReg() && RI.isAGPR(MRI, Src1.getReg())) 4061 if (isLegalRegOperand(MRI, InstrDesc.OpInfo[Src1Idx], Src1)) 4067 if (Opc == AMDGPU::V_READLANE_B32 && Src1.isReg() && 4068 RI.isVGPR(MRI, Src1.getReg())) { 4072 .add(Src1); 4073 Src1.ChangeToRegister(Reg, false); 4091 if ((!Src1.isImm() && !Src1.isReg()) || 4091 if ((!Src1.isImm() && !Src1.isReg()) || 4109 if (Src1.isImm()) 4110 Src0.ChangeToImmediate(Src1.getImm()); 4111 else if (Src1.isReg()) { 4112 Src0.ChangeToRegister(Src1.getReg(), false, false, Src1.isKill()); 4112 Src0.ChangeToRegister(Src1.getReg(), false, false, Src1.isKill()); 4113 Src0.setSubReg(Src1.getSubReg()); 4117 Src1.ChangeToRegister(Src0Reg, false, false, Src0Kill); 4118 Src1.setSubReg(Src0SubReg);