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References

lib/Target/AMDGPU/SIInsertWaitcnts.cpp
  175   case LGKM_CNT:
  205     case LGKM_CNT:
  235     if (WaitEventMaskForInst[LGKM_CNT] & (1 << E))
  236       return LGKM_CNT;
  247     assert(T == LGKM_CNT);
  288     return ((LastFlat[LGKM_CNT] > ScoreLBs[LGKM_CNT] &&
  288     return ((LastFlat[LGKM_CNT] > ScoreLBs[LGKM_CNT] &&
  289              LastFlat[LGKM_CNT] <= ScoreUBs[LGKM_CNT]) ||
  289              LastFlat[LGKM_CNT] <= ScoreUBs[LGKM_CNT]) ||
  296     LastFlat[LGKM_CNT] = ScoreUBs[LGKM_CNT];
  296     LastFlat[LGKM_CNT] = ScoreUBs[LGKM_CNT];
  338       assert(T == LGKM_CNT);
  433       ForceEmitWaitcnt[LGKM_CNT] = true;
  435       ForceEmitWaitcnt[LGKM_CNT] = false;
  672     case LGKM_CNT:
  700       if (T == LGKM_CNT) {
  702           uint32_t RegScore = getRegScore(J + NUM_ALL_VGPRS, LGKM_CNT);
  720          simplifyWaitcnt(LGKM_CNT, Wait.LgkmCnt) |
  742     if ((T == VM_CNT || T == LGKM_CNT) &&
  763   applyWaitcnt(LGKM_CNT, Wait.LgkmCnt);
  786   if (T == LGKM_CNT && hasPendingEvent(SMEM_ACCESS))
  955             LGKM_CNT, ScoreBrackets.getRegScore(RegNo, LGKM_CNT), Wait);
  955             LGKM_CNT, ScoreBrackets.getRegScore(RegNo, LGKM_CNT), Wait);
  966               LGKM_CNT, ScoreBrackets.getRegScore(RegNo, LGKM_CNT), Wait);
  966               LGKM_CNT, ScoreBrackets.getRegScore(RegNo, LGKM_CNT), Wait);
  999               LGKM_CNT, ScoreBrackets.getRegScore(RegNo, LGKM_CNT), Wait);
  999               LGKM_CNT, ScoreBrackets.getRegScore(RegNo, LGKM_CNT), Wait);
 1036               LGKM_CNT, ScoreBrackets.getRegScore(RegNo, LGKM_CNT), Wait);
 1036               LGKM_CNT, ScoreBrackets.getRegScore(RegNo, LGKM_CNT), Wait);
 1055     if (ScoreBrackets.getScoreLB(LGKM_CNT) <
 1056             ScoreBrackets.getScoreUB(LGKM_CNT) &&
 1096   if (ForceEmitWaitcnt[LGKM_CNT])
 1343     if (T == LGKM_CNT) {
 1393       if (ScoreBrackets.getScoreLB(LGKM_CNT) <
 1394               ScoreBrackets.getScoreUB(LGKM_CNT) &&