reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
3587 if (TII->isMIMG(MI)) { 3613 MachineOperand Src0Sub0 = TII->buildExtractSubRegOrImm(MI, MRI, 3616 MachineOperand Src0Sub1 = TII->buildExtractSubRegOrImm(MI, MRI, 3620 MachineOperand Src1Sub0 = TII->buildExtractSubRegOrImm(MI, MRI, 3623 MachineOperand Src1Sub1 = TII->buildExtractSubRegOrImm(MI, MRI, 3631 BuildMI(*BB, MI, DL, TII->get(LoOpc), DestSub0) 3634 BuildMI(*BB, MI, DL, TII->get(HiOpc), DestSub1) 3637 BuildMI(*BB, MI, DL, TII->get(TargetOpcode::REG_SEQUENCE), Dest.getReg()) 3647 TII->get(AMDGPU::S_MOV_B32), AMDGPU::M0) 3654 BuildMI(*BB, &*BB->begin(), MI.getDebugLoc(), TII->get(AMDGPU::S_MOV_B64), 3662 BuildMI(*BB, &*BB->begin(), MI.getDebugLoc(), TII->get(AMDGPU::S_MOV_B32), 3704 BuildMI(*BB, FirstMI, DebugLoc(), TII->get(AMDGPU::S_BFE_U32), CountReg) 3708 TII->get(isWave32 ? AMDGPU::S_BFM_B32 : AMDGPU::S_BFM_B64), 3712 BuildMI(*BB, FirstMI, DebugLoc(), TII->get(AMDGPU::S_CMP_EQ_U32)) 3716 TII->get(isWave32 ? AMDGPU::S_CMOV_B32 : AMDGPU::S_CMOV_B64), 3727 BuildMI(*BB, MI, DL, TII->get(AMDGPU::S_MOV_B32)) 3764 BuildMI(*BB, MI, DL, TII->get(AMDGPU::COPY), SrcCondCopy) 3766 BuildMI(*BB, MI, DL, TII->get(AMDGPU::V_CNDMASK_B32_e64), DstLo) 3772 BuildMI(*BB, MI, DL, TII->get(AMDGPU::V_CNDMASK_B32_e64), DstHi) 3779 BuildMI(*BB, MI, DL, TII->get(AMDGPU::REG_SEQUENCE), Dst) 3833 if (TII->pseudoToMCOpcode(Opc) == -1) { 3838 auto I = BuildMI(*BB, MI, DL, TII->get(Opc), MI.getOperand(0).getReg()); 3839 if (TII->isVOP3(*I)) { 3849 TII->legalizeOperands(*I);