reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/AMDGPU/SIISelLowering.cpp
10296   unsigned Opcode = Node->getMachineOpcode();
10300     return adjustWritemask(Node, DAG);
10305     legalizeTargetIndependentNode(Node, DAG);
10306     return Node;
10315     SDValue Src0 = Node->getOperand(0);
10316     SDValue Src1 = Node->getOperand(1);
10317     SDValue Src2 = Node->getOperand(2);
10331     SDValue ImpDef = DAG.getCopyToReg(DAG.getEntryNode(), SDLoc(Node),
10353     for (unsigned I = 3, N = Node->getNumOperands(); I != N; ++I)
10354       Ops.push_back(Node->getOperand(I));
10357     return DAG.getMachineNode(Opcode, SDLoc(Node), Node->getVTList(), Ops);
10357     return DAG.getMachineNode(Opcode, SDLoc(Node), Node->getVTList(), Ops);
10361     ConstantSDNode *FI = cast<ConstantSDNode>(Node->getOperand(0));
10362     ConstantSDNode *BC = cast<ConstantSDNode>(Node->getOperand(2));
10365     SDValue VDstIn = Node->getOperand(6);
10370                                                SDLoc(Node), MVT::i32);
10371     SmallVector<SDValue, 8> Ops = { SDValue(FI, 0), Node->getOperand(1),
10372                                     SDValue(BC, 0), Node->getOperand(3),
10373                                     Node->getOperand(4), Node->getOperand(5),
10373                                     Node->getOperand(4), Node->getOperand(5),
10374                                     SDValue(ImpDef, 0), Node->getOperand(7) };
10375     return DAG.getMachineNode(Opcode, SDLoc(Node), Node->getVTList(), Ops);
10375     return DAG.getMachineNode(Opcode, SDLoc(Node), Node->getVTList(), Ops);
10381   return Node;