reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/AMDGPU/SIISelLowering.cpp
 9500     if (numBitsUnsigned(MulLHS, DAG) <= 32 &&
 9501         numBitsUnsigned(MulRHS, DAG) <= 32) {
 9502       MulLHS = DAG.getZExtOrTrunc(MulLHS, SL, MVT::i32);
 9503       MulRHS = DAG.getZExtOrTrunc(MulRHS, SL, MVT::i32);
 9504       AddRHS = DAG.getZExtOrTrunc(AddRHS, SL, MVT::i64);
 9505       return getMad64_32(DAG, SL, VT, MulLHS, MulRHS, AddRHS, false);
 9508     if (numBitsSigned(MulLHS, DAG) < 32 && numBitsSigned(MulRHS, DAG) < 32) {
 9508     if (numBitsSigned(MulLHS, DAG) < 32 && numBitsSigned(MulRHS, DAG) < 32) {
 9509       MulLHS = DAG.getSExtOrTrunc(MulLHS, SL, MVT::i32);
 9510       MulRHS = DAG.getSExtOrTrunc(MulRHS, SL, MVT::i32);
 9511       AddRHS = DAG.getSExtOrTrunc(AddRHS, SL, MVT::i64);
 9512       return getMad64_32(DAG, SL, VT, MulLHS, MulRHS, AddRHS, true);
 9518   if (SDValue V = reassociateScalarOps(N, DAG)) {
 9541     SDVTList VTList = DAG.getVTList(MVT::i32, MVT::i1);
 9542     SDValue Args[] = { LHS, DAG.getConstant(0, SL, MVT::i32), Cond };
 9544     return DAG.getNode(Opc, SL, VTList, Args);
 9551     return DAG.getNode(ISD::ADDCARRY, SDLoc(N), RHS->getVTList(), Args);