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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc15378 static const MCOperandInfo OperandInfo36[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15379 static const MCOperandInfo OperandInfo37[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15380 static const MCOperandInfo OperandInfo38[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15381 static const MCOperandInfo OperandInfo39[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15382 static const MCOperandInfo OperandInfo40[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15383 static const MCOperandInfo OperandInfo41[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15384 static const MCOperandInfo OperandInfo42[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15385 static const MCOperandInfo OperandInfo43[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15386 static const MCOperandInfo OperandInfo44[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15387 static const MCOperandInfo OperandInfo45[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15388 static const MCOperandInfo OperandInfo46[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15389 static const MCOperandInfo OperandInfo47[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15390 static const MCOperandInfo OperandInfo48[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15391 static const MCOperandInfo OperandInfo49[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15392 static const MCOperandInfo OperandInfo50[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15393 static const MCOperandInfo OperandInfo51[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15394 static const MCOperandInfo OperandInfo52[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15395 static const MCOperandInfo OperandInfo53[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15396 static const MCOperandInfo OperandInfo54[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15397 static const MCOperandInfo OperandInfo55[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15398 static const MCOperandInfo OperandInfo56[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15399 static const MCOperandInfo OperandInfo57[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15400 static const MCOperandInfo OperandInfo58[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15401 static const MCOperandInfo OperandInfo59[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15402 static const MCOperandInfo OperandInfo60[] = { { AMDGPU::VReg_96RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15403 static const MCOperandInfo OperandInfo61[] = { { AMDGPU::VReg_96RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15404 static const MCOperandInfo OperandInfo62[] = { { AMDGPU::VReg_96RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15405 static const MCOperandInfo OperandInfo63[] = { { AMDGPU::VReg_96RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15406 static const MCOperandInfo OperandInfo64[] = { { AMDGPU::VReg_96RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15407 static const MCOperandInfo OperandInfo65[] = { { AMDGPU::VReg_96RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15408 static const MCOperandInfo OperandInfo66[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15409 static const MCOperandInfo OperandInfo67[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15410 static const MCOperandInfo OperandInfo68[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15411 static const MCOperandInfo OperandInfo69[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15412 static const MCOperandInfo OperandInfo70[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15413 static const MCOperandInfo OperandInfo71[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15414 static const MCOperandInfo OperandInfo72[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15415 static const MCOperandInfo OperandInfo73[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15416 static const MCOperandInfo OperandInfo74[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15417 static const MCOperandInfo OperandInfo75[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15418 static const MCOperandInfo OperandInfo76[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15419 static const MCOperandInfo OperandInfo77[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15420 static const MCOperandInfo OperandInfo78[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
15421 static const MCOperandInfo OperandInfo79[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
15422 static const MCOperandInfo OperandInfo80[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
15423 static const MCOperandInfo OperandInfo81[] = { { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15604 static const MCOperandInfo OperandInfo262[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15605 static const MCOperandInfo OperandInfo263[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15606 static const MCOperandInfo OperandInfo264[] = { { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15607 static const MCOperandInfo OperandInfo265[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15608 static const MCOperandInfo OperandInfo266[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15609 static const MCOperandInfo OperandInfo267[] = { { AMDGPU::VReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15610 static const MCOperandInfo OperandInfo268[] = { { AMDGPU::VReg_96RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15611 static const MCOperandInfo OperandInfo269[] = { { AMDGPU::VReg_96RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15612 static const MCOperandInfo OperandInfo270[] = { { AMDGPU::VReg_96RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15613 static const MCOperandInfo OperandInfo271[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VReg_64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15614 static const MCOperandInfo OperandInfo272[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15615 static const MCOperandInfo OperandInfo273[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15617 static const MCOperandInfo OperandInfo275[] = { { AMDGPU::AGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VGPR_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, };
15622 static const MCOperandInfo OperandInfo280[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::VS_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::VS_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15622 static const MCOperandInfo OperandInfo280[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::VS_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::VS_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15642 static const MCOperandInfo OperandInfo300[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::VS_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15680 static const MCOperandInfo OperandInfo338[] = { { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::VS_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::VS_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15680 static const MCOperandInfo OperandInfo338[] = { { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::VS_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::VS_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15681 static const MCOperandInfo OperandInfo339[] = { { AMDGPU::SReg_1RegClassID, 0, AMDGPU::OPERAND_SDWA_VOPC_DST, 0 }, { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::VS_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::VS_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15681 static const MCOperandInfo OperandInfo339[] = { { AMDGPU::SReg_1RegClassID, 0, AMDGPU::OPERAND_SDWA_VOPC_DST, 0 }, { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::VS_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::VS_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15694 static const MCOperandInfo OperandInfo352[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::VS_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15763 static const MCOperandInfo OperandInfo421[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15763 static const MCOperandInfo OperandInfo421[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { -1, 0, AMDGPU::OPERAND_INPUT_MODS, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15770 static const MCOperandInfo OperandInfo428[] = { { AMDGPU::SReg_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::VRegOrLds_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, };
15774 static const MCOperandInfo OperandInfo432[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
15774 static const MCOperandInfo OperandInfo432[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
16059 static const MCOperandInfo OperandInfo717[] = { { AMDGPU::VGPR_32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AMDGPU::SRegOrLds_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, 0 }, { AMDGPU::SReg_32RegClassID, 0, AMDGPU::OPERAND_REG_INLINE_C_INT32, 0 }, { AMDGPU::VS_32RegClassID, 0, AMDGPU::OPERAND_REG_IMM_INT32, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp 1472 case AMDGPU::OPERAND_REG_INLINE_C_INT32:
1746 case AMDGPU::OPERAND_REG_INLINE_C_INT32:
1786 case AMDGPU::OPERAND_REG_INLINE_C_INT32:
lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp 523 case AMDGPU::OPERAND_REG_INLINE_C_INT32:
lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp 239 case AMDGPU::OPERAND_REG_INLINE_C_INT32:
lib/Target/AMDGPU/SIFoldOperands.cpp 645 TII->isInlineConstant(OpToFold, AMDGPU::OPERAND_REG_INLINE_C_INT32)) {
688 getRegSeqInit(Defs, UseReg, AMDGPU::OPERAND_REG_INLINE_C_INT32, TII,
704 TII->isInlineConstant(*Def, AMDGPU::OPERAND_REG_INLINE_C_INT32)) {
lib/Target/AMDGPU/SIInstrInfo.cpp 2846 case AMDGPU::OPERAND_REG_INLINE_C_INT32:
3253 case AMDGPU::OPERAND_REG_INLINE_C_INT32:
lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h 583 case AMDGPU::OPERAND_REG_INLINE_C_INT32: