reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
476 switch (Op.getOpcode()) { 477 default: return AMDGPUTargetLowering::LowerOperation(Op, DAG); 478 case ISD::EXTRACT_VECTOR_ELT: return LowerEXTRACT_VECTOR_ELT(Op, DAG); 479 case ISD::INSERT_VECTOR_ELT: return LowerINSERT_VECTOR_ELT(Op, DAG); 480 case ISD::SHL_PARTS: return LowerSHLParts(Op, DAG); 482 case ISD::SRL_PARTS: return LowerSRXParts(Op, DAG); 483 case ISD::UADDO: return LowerUADDSUBO(Op, DAG, ISD::ADD, AMDGPUISD::CARRY); 484 case ISD::USUBO: return LowerUADDSUBO(Op, DAG, ISD::SUB, AMDGPUISD::BORROW); 486 case ISD::FSIN: return LowerTrig(Op, DAG); 487 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG); 488 case ISD::STORE: return LowerSTORE(Op, DAG); 490 SDValue Result = LowerLOAD(Op, DAG); 497 case ISD::BRCOND: return LowerBRCOND(Op, DAG); 498 case ISD::GlobalAddress: return LowerGlobalAddress(MFI, Op, DAG); 499 case ISD::FrameIndex: return lowerFrameIndex(Op, DAG); 501 SDValue Chain = Op.getOperand(0); 503 cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue(); 506 SDLoc DL(Op); 509 Op.getOperand(2), // Export Value 510 Op.getOperand(3), // ArrayBase 511 Op.getOperand(4), // Type 517 return DAG.getNode(AMDGPUISD::R600_EXPORT, DL, Op.getValueType(), Args); 528 cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue(); 529 EVT VT = Op.getValueType(); 530 SDLoc DL(Op); 548 Op.getOperand(1), 553 Op.getOperand(2), 554 Op.getOperand(3), 555 Op.getOperand(4), 560 Op.getOperand(5), 561 Op.getOperand(6), 562 Op.getOperand(7), 563 Op.getOperand(8), 564 Op.getOperand(9), 565 Op.getOperand(10) 571 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1), 573 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2), 575 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1), 577 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2), 579 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1), 581 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2), 583 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1), 585 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2), 635 return DAG.getNode(AMDGPUISD::RSQ, DL, VT, Op.getOperand(1)); 638 return DAG.getNode(AMDGPUISD::RSQ_CLAMP, DL, VT, Op.getOperand(1)); 640 return Op;