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References

lib/Target/AMDGPU/GCNRegBankReassign.cpp
  287     return Reg % NUM_VGPR_BANKS;
  323     Mask <<= (Bank == -1) ? Reg % NUM_VGPR_BANKS : unsigned(Bank);
  324     return (Mask | (Mask >> NUM_VGPR_BANKS)) & VGPR_BANK_MASK;
  375       if (!(LM & 1) && (Bank < NUM_VGPR_BANKS)) {
  377         if (countPopulation(LM) >= NUM_VGPR_BANKS)
  379         ShiftedBank = (Bank + countTrailingZeros(LM)) % NUM_VGPR_BANKS;
  461   if ((Mask & VGPR_BANK_MASK) && (Size < NUM_VGPR_BANKS)) {
  462     for (unsigned I = 0; I < NUM_VGPR_BANKS; ++I) {
  466       NewMask = (NewMask | (NewMask >> NUM_VGPR_BANKS)) & VGPR_BANK_MASK;
  501     if (Shift >= NUM_VGPR_BANKS)
  504     FreeBanks = ((VB >> Shift) | (VB << (NUM_VGPR_BANKS - Shift))) &
  592   unsigned MaxNumRegs = (Bank < NUM_VGPR_BANKS) ? MaxNumVGPRs
  594   unsigned MaxReg = MaxNumRegs + (Bank < NUM_VGPR_BANKS ? AMDGPU::VGPR0