reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
   60   MCOperand createRegOperand(unsigned int RegId) const;

References

lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
  442       insertNamedMCOperand(MI, createRegOperand(AMDGPU::VCC),
  630   return createRegOperand(RegCl.getRegister(Val));
 1061   case 102: return createRegOperand(FLAT_SCR_LO);
 1062   case 103: return createRegOperand(FLAT_SCR_HI);
 1063   case 104: return createRegOperand(XNACK_MASK_LO);
 1064   case 105: return createRegOperand(XNACK_MASK_HI);
 1065   case 106: return createRegOperand(VCC_LO);
 1066   case 107: return createRegOperand(VCC_HI);
 1067   case 108: return createRegOperand(TBA_LO);
 1068   case 109: return createRegOperand(TBA_HI);
 1069   case 110: return createRegOperand(TMA_LO);
 1070   case 111: return createRegOperand(TMA_HI);
 1071   case 124: return createRegOperand(M0);
 1072   case 125: return createRegOperand(SGPR_NULL);
 1073   case 126: return createRegOperand(EXEC_LO);
 1074   case 127: return createRegOperand(EXEC_HI);
 1075   case 235: return createRegOperand(SRC_SHARED_BASE);
 1076   case 236: return createRegOperand(SRC_SHARED_LIMIT);
 1077   case 237: return createRegOperand(SRC_PRIVATE_BASE);
 1078   case 238: return createRegOperand(SRC_PRIVATE_LIMIT);
 1079   case 239: return createRegOperand(SRC_POPS_EXITING_WAVE_ID);
 1080   case 251: return createRegOperand(SRC_VCCZ);
 1081   case 252: return createRegOperand(SRC_EXECZ);
 1082   case 253: return createRegOperand(SRC_SCC);
 1083   case 254: return createRegOperand(LDS_DIRECT);
 1093   case 102: return createRegOperand(FLAT_SCR);
 1094   case 104: return createRegOperand(XNACK_MASK);
 1095   case 106: return createRegOperand(VCC);
 1096   case 108: return createRegOperand(TBA);
 1097   case 110: return createRegOperand(TMA);
 1098   case 125: return createRegOperand(SGPR_NULL);
 1099   case 126: return createRegOperand(EXEC);
 1100   case 235: return createRegOperand(SRC_SHARED_BASE);
 1101   case 236: return createRegOperand(SRC_SHARED_LIMIT);
 1102   case 237: return createRegOperand(SRC_PRIVATE_BASE);
 1103   case 238: return createRegOperand(SRC_PRIVATE_LIMIT);
 1104   case 239: return createRegOperand(SRC_POPS_EXITING_WAVE_ID);
 1105   case 251: return createRegOperand(SRC_VCCZ);
 1106   case 252: return createRegOperand(SRC_EXECZ);
 1107   case 253: return createRegOperand(SRC_SCC);
 1185     return createRegOperand(IsWave64 ? AMDGPU::VCC : AMDGPU::VCC_LO);